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TPS7B8350QDCYRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTPS7B8350QDCYRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-4
TPS7B8350QDCYRQ1 from Texas Instruments, in a SOT-223-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input power-supply voltage pin; the input is specified from 3 V to 40 V (42 V maximum), with a ceramic capacitor of 0.1 µF to 1 µF from IN to ground placed as close to the device as possible. |
| 2 | GND | power_in | Ground pin; connect it to the thermal pad with a low-impedance connection. |
| 3 | OUT | power_out | Regulated output voltage pin; a capacitor of at least 2.2 µF (effective output capacitance of at least 1 µF) is required from OUT to ground for stability, with ESR between 0.001 Ω and 2 Ω. |
| 4 | GND | power_in | Ground pin; connect it to the thermal pad with a low-impedance connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-4 |
| Category | Power Management (PMIC) |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Regulated output accuracy | VOUT | -0.75 | 0.75 | % | TJ = 25ºC; VIN = VOUT + 500 mV to 40 V, IOUT = 100 µA to 150 mA | 4 | |
| Regulated output accuracy | VOUT | -1 | 1 | % | TJ = -40°C to +150°C; VIN = VOUT + 500 mV to 40 V, IOUT = 100 µA to 150 mA | 4 | |
| Quiescent current | IQ | 18 | 21 | µA | VIN = VOUT + 500 mV to 40 V, IOUT = 0 mA, TJ = 25ºC | 5 | |
| Quiescent current | IQ | 26 | µA | VIN = VOUT + 500 mV to 40 V, IOUT = 0 mA, TJ = -40°C to +150°C | 5 | ||
| Quiescent current | IQ | 35 | µA | IOUT = 500 µA, TJ = -40°C to +150°C | 5 | ||
| Dropout voltage | VDO | 130 | 180 | mV | IOUT = 105 mA, VOUT ≥ 3.3 V, VIN = VOUT(NOM) | 5 | |
| Dropout voltage | VDO | 160 | 230 | mV | IOUT = 150 mA, VOUT ≥ 3.3 V, VIN = VOUT(NOM) | 5 | |
| Dropout voltage | VDO | 47 | mV | IOUT ≤ 1 mA, VOUT ≥ 3.3 V, VIN = VOUT(NOM) x 0.95 | 5 | ||
| Rising input supply UVLO | VUVLO(RISING) | 2.6 | 2.7 | 2.82 | V | VIN rising | 5 |
| Falling input supply UVLO | VUVLO(FALLING) | 2.38 | 2.5 | 2.6 | V | VIN falling | 5 |
| UVLO hysteresis | VUVLO(HYST) | 230 | mV | 5 | |||
| Output current limit | ICL | 180 | 220 | 260 | mA | VIN = VOUT(nom) + 1 V, VOUT short to 90% x VOUT(NOM) | 5 |
| Junction shutdown temperature | TSD(SHUTDOWN) | 175 | °C | 5 | |||
| Hysteresis of thermal shutdown | TSD(HYST) | 20 | °C | 5 | |||
| Load transient response overshoot, undershoot | ΔVOUT | -2 | 10 | %VOUT | IOUT = 45 mA to 105 mA | 4 | |
| Input voltage | VIN | 3 | 40 | V | 4 | ||
| Output voltage | VOUT | 1.2 | 18 | V | 4 | ||
| Output current | IOUT | 0 | 150 | mA | 4 | ||
| Output capacitor | COUT | 2.2 | 220 | µF | 4 | ||
| Output capacitor ESR requirements | ESR | 0.001 | 2 | Ω | 4 | ||
| Input capacitor | CIN | 0.1 | 1 | µF | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Unregulated input | IN | -0.3 | 42 | V | 3 | ||
| Regulated output | OUT | -0.3 | V | max VIN + 0.3 V or 20 V, whichever is smaller | 3 | ||
| Operating ambient temperature | TA | -40 | 125 | °C | 3 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Junction-to-ambient thermal resistance | RθJA | 77.1 | °C/W | JEDEC high-K profile, JESD 51-7 | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 41.7 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 11.7 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 3.3 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 11.5 | °C/W | 4 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 11.5 | °C/W | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor, and to the LDO ground pin as close as possible to each other, connected by a wide, component-side, copper surface. The use of vias and long traces to the input and output capacitors is stro | 21 |
CAD (KiCad official)
- Symbol:
TPS7B8350QDCYRQ1 - Footprint:
Package_TO_SOT_SMD:SOT-223 - 3D model: SOT-223-4 (KiCad packages3D, STEP)
- 3D model files:
tps7b8350qdcyrq1-etched.step/tps7b8350qdcyrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7b8350qdcyrq1.step/tps7b8350qdcyrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
02be2acd575897f2, retrieved 2026-11-05, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).