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Contents

README

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TPS7B8225QDGNRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HVSSOP-8

TPS7B8225QDGNRQ1 from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated input supply pin with a 3 V to 40 V recommended operating range and a 45 V absolute maximum for 200 ms transients; a 10 µF to 22 µF capacitor from IN to GND is recommended for good analog practice.
2 EN input High-voltage-tolerant enable input where a logic high (VIH ≥ 2 V) enables the regulator and a logic low (VIL ≤ 0.7 V) disables it, with VEN limited to -0.3 V to VIN.
3 NC unconnected No internal connection; this pin is not connected to the die.
4 GND power_in Ground reference pin; all voltages are referenced to GND and it should be tied to a large ground plane.
5 GND power_in Ground reference pin; all voltages are referenced to GND and it should be tied to a large ground plane.
6 GND power_in Ground reference pin; all voltages are referenced to GND and it should be tied to a large ground plane.
7 NC unconnected No internal connection; this pin is not connected to the die.
8 OUT power_out Regulated output for the fixed 2.5 V, 3.3 V or 5 V option, rated for up to 300 mA and requiring a 1 µF to 200 µF output capacitor with 0.001 Ω to 5 Ω ESR; the absolute maximum rating is 7 V.
9 PAD passive Exposed thermal pad that must be soldered to a large GND copper plane for thermal and mechanical performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HVSSOP-8
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: TPS7B8225QDGNRQ1
  • Footprint: Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm
  • 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps7b8225qdgnrq1-etched.step / tps7b8225qdgnrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7b8225qdgnrq1.step / tps7b8225qdgnrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 966705c45a2bb818, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF