component
TPS7B7050QPWPRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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TPS7B7050QPWPRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-16-EP
TPS7B7050QPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input power supply, 4-40 V operating range with 45 V absolute maximum transient rating. |
| 2 | EN | input | Enable input with VIL = 0.7 V, VIH = 2 V, 150 mV hysteresis, operating 0-VIN volts. |
| 3 | GND | power_in | Ground reference. |
| 4 | GND | power_in | Ground reference. |
| 5 | GND | power_in | Ground reference. |
| 6 | GND | power_in | Ground reference. |
| 7 | GND | power_in | Ground reference. |
| 8 | DELAY | output | Power-good delay timer pin with internal charge current 3-10 µA, threshold 0.95-1.05 V, maximum 5.5 V. |
| 9 | GND | power_in | Ground reference. |
| 10 | GND | power_in | Ground reference. |
| 11 | VINT | input | Internal voltage reference requiring bias above 2 V for lowest quiescent current, 7 V absolute maximum. |
| 12 | GND | power_in | Ground reference. |
| 13 | GND | power_in | Ground reference. |
| 14 | PG | tri_state | Open-drain power-good output pulled up externally through resistor, leakage current ≤ 1 µA, 0-5.5 V operating. |
| 15 | PGADJ | output | Threshold adjustment pin for external resistor divider setting switching point 1.067-1.133 V or connect to ground for 91.6% default threshold, 5.5 V maximum. |
| 16 | OUT | power_out | Regulated output voltage 3.3 V or 5 V, maximum 300 mA output current, dropout voltage 300-400 mV at 300 mA load. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS7B7050QPWPRQ1 - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
tps7b7050qpwprq1-etched.step/tps7b7050qpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7b7050qpwprq1.step/tps7b7050qpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
6955cc70e8bc9b62, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).