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docs tps7b6933qdbvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tps7b6933qdbvrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tps7b6933qdbvrq1: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tps7b6933qdbvrq1-etched.fit.json tps7b6933qdbvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps7b6933qdbvrq1-etched.glb tps7b6933qdbvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps7b6933qdbvrq1-etched.step tps7b6933qdbvrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tps7b6933qdbvrq1.glb Publish 0.1.0 · Ray
tps7b6933qdbvrq1.kicad_mod Publish 0.1.0 · Ray
tps7b6933qdbvrq1.kicad_sym Publish 0.1.0 · Ray
tps7b6933qdbvrq1.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tps7b6933qdbvrq1.step Publish 0.1.0 · Ray

TPS7B6933QDBVRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS7B6933QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated input power-supply voltage. Recommended operating range 4 V to 40 V (5.5 V min for 5-V version); absolute maximum 45 V (200 ms transient). Requires a 10 µF input capacitor to GND for stability.
2 NC unconnected No internal connection. May be left floating or tied to GND.
3 GND power_in Ground reference. All device voltages are measured with respect to this terminal.
4 GND power_in Ground reference (second GND pin). Tie to pin 3 GND; also provides thermal conduction path to the PCB copper.
5 OUT power_out Regulated 3.3-V output (±3%). Delivers up to 150 mA with short-circuit current limit (150-500 mA). Requires a 2.2 µF to 100 µF ceramic output capacitor (ESR 1 mΩ to 2 Ω) for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • TPS7B6933QDBVRQ1
  • TPS7B6933QDBVRQ1DBVT
  • TPS7B6933QDBVRQ1DCY
  • TPS7B6933QDBVRQ1DCYR

CAD (KiCad official)

  • Symbol: TPS7B6933QDBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps7b6933qdbvrq1-etched.step / tps7b6933qdbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7b6933qdbvrq1.step / tps7b6933qdbvrq1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps7b6933qdbvrq1.step 85 KB You want the bare part, or you mark your own boards.
tps7b6933qdbvrq1-etched.step 3.2 MB You want the part with TPS7B6933QDBVRQ1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 762 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 ea25f73e6fdeb0fa, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF