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TPS7B6925QDBVRQ1
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Texas Instruments Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS7B6925QDBVRQ1
Texas Instruments · Linear Voltage Regulators (LDO) · SOT-23-5
TPS7B6925QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input power-supply voltage, operating range 4 V to 40 V (45 V absolute maximum); a capacitor higher than 0.1 µF close to this pin is recommended. |
| 2 | NC | unconnected | Not connected pin, no internal connection. |
| 3 | GND | power_in | Ground reference. |
| 4 | GND | power_in | Ground reference. |
| 5 | OUT | power_out | Regulated 2.5-V output for the TPS7B6925-Q1, up to 150 mA, requiring an output capacitor of 2.2 µF to 100 µF with ESR below 2 Ω. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (2.5-V output) | VI | 4 | 40 | V | Fixed 2.5-V output, IO = 1 mA | 5 | |
| Quiescent current | IQ | 15 | 25 | µA | Fixed 2.5-V and 3.3-V version, VI = 4 to 40 V, IO = 0.2 mA | 5 | |
| IN undervoltage detection, ramp up | VIN(UVLO) | 3.65 | V | Ramp VI up until the output turns on | 5 | ||
| IN undervoltage detection, ramp down | VIN(UVLO) | 3 | V | Ramp VI down until the output turns OFF | 5 | ||
| Regulated output tolerance | VO | -3 | 3 | % | Fixed 2.5-V version, VI = 4 to 40 V, IO = 1 to 150 mA | 5 | |
| Line regulation | ΔVO(ΔVI) | 10 | mV | VI = 6 to 40 V, ΔVO, IO = 10 mA | 5 | ||
| Load regulation | ΔVO(ΔIL) | 20 | mV | IO = 1 to 150 mA, ΔVO | 5 | ||
| Dropout voltage 50 mA | VDROP | 1.575 | V | Fixed 2.5-V version, VI, VO, IO = 50 mA | 5 | ||
| Dropout voltage 100 mA | VDROP | 1.575 | V | Fixed 2.5-V version, VI, VO, IO = 100 mA | 5 | ||
| Output current | IO | 0 | 150 | mA | VO in regulation | 5 | |
| Output current limit | IOCL | 150 | 500 | mA | OUT short to ground | 5 | |
| Power supply ripple rejection | PSRR | 60 | dB | Vrip = 0.5 Vpp, Load = 10 mA, f = 100 Hz, CO = 2.2 µF | 5 | ||
| Junction shutdown temperature | Tsd | 175 | °C | 5 | |||
| Hysteresis of thermal shutdown | Thys | 25 | °C | 5 | |||
| Unregulated input voltage IN | VI | -0.3 | 45 | V | Withstands 45 V for 200 ms | 4 | |
| Regulated output voltage OUT | VO | -0.3 | 7 | V | 4 | ||
| Operating junction temperature range | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, AEC Q100-002 | 4 | |
| ESD CDM other pins | V(ESD) | -500 | 500 | V | Charged device model, AEC Q100-011, other pins | 4 | |
| ESD CDM corner pins | V(ESD) | -750 | 750 | V | Charged device model, AEC Q100-011, corner pins (5 pin: 1, 3, 4, and 5) | 4 | |
| Unregulated input voltage | VI | 4 | 40 | V | 4 | ||
| Output voltage | VO | 0 | 5.5 | V | 4 | ||
| Output capacitor | CO | 2.2 | 100 | µF | Effective value | 4 | |
| Output ESR | ESRCO | 0.001 | 2 | Ω | At f = 10 kHz | 4 | |
| Operating junction temperature range | TJ | -40 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 210.4 | °C/W | DBV, 5 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 126.1 | °C/W | DBV, 5 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 38.4 | °C/W | DBV, 5 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 16 | °C/W | DBV, 5 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 37.5 | °C/W | DBV, 5 pins | 4 |
CAD (KiCad official)
- Symbol:
TPS7B6925QDBVRQ1 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps7b6925qdbvrq1-etched.step/tps7b6925qdbvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7b6925qdbvrq1.step/tps7b6925qdbvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
91652020d6cc8bc6, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS7B6925QDBVRQ1
**Texas Instruments** · Linear Voltage Regulators (LDO) · SOT-23-5
TPS7B6925QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input power-supply voltage, operating range 4 V to 40 V (45 V absolute maximum); a capacitor higher than 0.1 µF close to this pin is recommended. |
| 2 | NC | unconnected | Not connected pin, no internal connection. |
| 3 | GND | power_in | Ground reference. |
| 4 | GND | power_in | Ground reference. |
| 5 | OUT | power_out | Regulated 2.5-V output for the TPS7B6925-Q1, up to 150 mA, requiring an output capacitor of 2.2 µF to 100 µF with ESR below 2 Ω. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (2.5-V output) | VI | 4 | | 40 | V | Fixed 2.5-V output, IO = 1 mA | 5 |
| Quiescent current | IQ | | 15 | 25 | µA | Fixed 2.5-V and 3.3-V version, VI = 4 to 40 V, IO = 0.2 mA | 5 |
| IN undervoltage detection, ramp up | VIN(UVLO) | | | 3.65 | V | Ramp VI up until the output turns on | 5 |
| IN undervoltage detection, ramp down | VIN(UVLO) | 3 | | | V | Ramp VI down until the output turns OFF | 5 |
| Regulated output tolerance | VO | -3 | | 3 | % | Fixed 2.5-V version, VI = 4 to 40 V, IO = 1 to 150 mA | 5 |
| Line regulation | ΔVO(ΔVI) | | | 10 | mV | VI = 6 to 40 V, ΔVO, IO = 10 mA | 5 |
| Load regulation | ΔVO(ΔIL) | | | 20 | mV | IO = 1 to 150 mA, ΔVO | 5 |
| Dropout voltage 50 mA | VDROP | | | 1.575 | V | Fixed 2.5-V version, VI, VO, IO = 50 mA | 5 |
| Dropout voltage 100 mA | VDROP | | | 1.575 | V | Fixed 2.5-V version, VI, VO, IO = 100 mA | 5 |
| Output current | IO | 0 | | 150 | mA | VO in regulation | 5 |
| Output current limit | IOCL | 150 | | 500 | mA | OUT short to ground | 5 |
| Power supply ripple rejection | PSRR | | 60 | | dB | Vrip = 0.5 Vpp, Load = 10 mA, f = 100 Hz, CO = 2.2 µF | 5 |
| Junction shutdown temperature | Tsd | | 175 | | °C | | 5 |
| Hysteresis of thermal shutdown | Thys | | 25 | | °C | | 5 |
| Unregulated input voltage IN | VI | -0.3 | | 45 | V | Withstands 45 V for 200 ms | 4 |
| Regulated output voltage OUT | VO | -0.3 | | 7 | V | | 4 |
| Operating junction temperature range | TJ | -40 | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| ESD HBM | V(ESD) | -2000 | | 2000 | V | Human body model, AEC Q100-002 | 4 |
| ESD CDM other pins | V(ESD) | -500 | | 500 | V | Charged device model, AEC Q100-011, other pins | 4 |
| ESD CDM corner pins | V(ESD) | -750 | | 750 | V | Charged device model, AEC Q100-011, corner pins (5 pin: 1, 3, 4, and 5) | 4 |
| Unregulated input voltage | VI | 4 | | 40 | V | | 4 |
| Output voltage | VO | 0 | | 5.5 | V | | 4 |
| Output capacitor | CO | 2.2 | | 100 | µF | Effective value | 4 |
| Output ESR | ESRCO | 0.001 | | 2 | Ω | At f = 10 kHz | 4 |
| Operating junction temperature range | TJ | -40 | | 150 | °C | | 4 |
| Junction-to-ambient thermal resistance | RθJA | | 210.4 | | °C/W | DBV, 5 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 126.1 | | °C/W | DBV, 5 pins | 4 |
| Junction-to-board thermal resistance | RθJB | | 38.4 | | °C/W | DBV, 5 pins | 4 |
| Junction-to-top characterization parameter | ψJT | | 16 | | °C/W | DBV, 5 pins | 4 |
| Junction-to-board characterization parameter | ψJB | | 37.5 | | °C/W | DBV, 5 pins | 4 |
## CAD (KiCad official)
- Symbol: `TPS7B6925QDBVRQ1`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps7b6925qdbvrq1-etched.step` / `tps7b6925qdbvrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7b6925qdbvrq1.step` / `tps7b6925qdbvrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7b69-q1) (26 pp, sha256 `91652020d6cc8bc6`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps7b6925qdbvrq1-datasheet.pdf)