component
TPS7B6701QPWPRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS7B6701QPWPRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20-EP
TPS7B6701QPWPRQ1 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Output ready signal with open-drain configuration, pulled low (VOL ≤ 0.4V at IOL = 0.5mA) when regulated output voltage falls below 89.6% of set value after 55-420µs deglitch delay. |
| 2 | NC | unconnected | Not connected. |
| 3 | DELAY | output | Reset pulse delay adjustment pin; external capacitor (100pF to 500nF) connected to GND sets power-on-reset delay time with constant charging current 6-14µA (typical 9.5µA) until 1V threshold. |
| 4 | VOUT | power_out | Regulated output voltage for adjustable version (1.5V to 18V), regulated within ±2% from input 4V-40V, maximum output current 450mA with 160-450mV dropout voltage depending on load. |
| 5 | ADJ | input | Feedback pin for output voltage adjustment, connected to 1.233V ± 2% bandgap reference through external resistor divider to set VOUT from 1.5V to 18V; maximum absolute voltage 22V, divider sum (R1+R2) 10kΩ-100kΩ. |
| 6 | NC | unconnected | Not connected. |
| 7 | NC | unconnected | Not connected. |
| 8 | GND | power_in | Ground reference pin for return current path. |
| 9 | NC | unconnected | Not connected. |
| 10 | NC | unconnected | Not connected. |
| 11 | NC | unconnected | Not connected. |
| 12 | NC | unconnected | Not connected. |
| 13 | GND | power_in | Ground reference pin for return current path. |
| 14 | NC | unconnected | Not connected. |
| 15 | EN | input | Enable input with high-voltage tolerance to 40V; logic high (≥1.7V) activates regulator, logic low (≤0.4V) disables regulator reducing quiescent current to <4µA. |
| 16 | NC | unconnected | Not connected. |
| 17 | NC | unconnected | Not connected. |
| 18 | NC | unconnected | Not connected. |
| 19 | VIN | power_in | Input power-supply voltage with operating range 4V to 40V (absolute maximum 45V transient), UVLO threshold 2.6V with 1V hysteresis; bypass capacitors (47µF electrolytic and 0.1µF ceramic) recommended. |
| 20 | NC | unconnected | Not connected. |
| 21 | PowerPAD | passive | Exposed thermal pad for heat dissipation; solder to enhanced copper area on PCB for improved thermal performance with junction-to-ambient thermal resistance 44.9°C/W and junction-to-board 23.6°C/W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS7B6701QPWPRQ1 - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps7b6701qpwprq1-etched.step/tps7b6701qpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7b6701qpwprq1.step/tps7b6701qpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
93476c3fcabd5f30, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS7B6701QPWPRQ1
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20-EP
TPS7B6701QPWPRQ1 from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Output ready signal with open-drain configuration, pulled low (VOL ≤ 0.4V at IOL = 0.5mA) when regulated output voltage falls below 89.6% of set value after 55-420µs deglitch delay. |
| 2 | NC | unconnected | Not connected. |
| 3 | DELAY | output | Reset pulse delay adjustment pin; external capacitor (100pF to 500nF) connected to GND sets power-on-reset delay time with constant charging current 6-14µA (typical 9.5µA) until 1V threshold. |
| 4 | VOUT | power_out | Regulated output voltage for adjustable version (1.5V to 18V), regulated within ±2% from input 4V-40V, maximum output current 450mA with 160-450mV dropout voltage depending on load. |
| 5 | ADJ | input | Feedback pin for output voltage adjustment, connected to 1.233V ± 2% bandgap reference through external resistor divider to set VOUT from 1.5V to 18V; maximum absolute voltage 22V, divider sum (R1+R2) 10kΩ-100kΩ. |
| 6 | NC | unconnected | Not connected. |
| 7 | NC | unconnected | Not connected. |
| 8 | GND | power_in | Ground reference pin for return current path. |
| 9 | NC | unconnected | Not connected. |
| 10 | NC | unconnected | Not connected. |
| 11 | NC | unconnected | Not connected. |
| 12 | NC | unconnected | Not connected. |
| 13 | GND | power_in | Ground reference pin for return current path. |
| 14 | NC | unconnected | Not connected. |
| 15 | EN | input | Enable input with high-voltage tolerance to 40V; logic high (≥1.7V) activates regulator, logic low (≤0.4V) disables regulator reducing quiescent current to <4µA. |
| 16 | NC | unconnected | Not connected. |
| 17 | NC | unconnected | Not connected. |
| 18 | NC | unconnected | Not connected. |
| 19 | VIN | power_in | Input power-supply voltage with operating range 4V to 40V (absolute maximum 45V transient), UVLO threshold 2.6V with 1V hysteresis; bypass capacitors (47µF electrolytic and 0.1µF ceramic) recommended. |
| 20 | NC | unconnected | Not connected. |
| 21 | PowerPAD | passive | Exposed thermal pad for heat dissipation; solder to enhanced copper area on PCB for improved thermal performance with junction-to-ambient thermal resistance 44.9°C/W and junction-to-board 23.6°C/W. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
## CAD (KiCad official)
- Symbol: `TPS7B6701QPWPRQ1`
- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`
- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps7b6701qpwprq1-etched.step` / `tps7b6701qpwprq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7b6701qpwprq1.step` / `tps7b6701qpwprq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7b67-q1) (31 pp, sha256 `93476c3fcabd5f30`, retrieved 2026-10-01, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps7b6701qpwprq1-datasheet.pdf)