component
TPS7A91
Public Made by Adomby adom
TI low-noise, high-PSRR LDO, VSON-10. 1 A, adjustable, programmable soft-start, fast transient. Datasheet-verified.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7A91
Texas Instruments · LDO regulator · VSON-10
Low-noise linear regulator for supplying sensitive analog and RF rails, delivering 1 A with high power-supply rejection across frequency and low output noise. A programmable soft-start (SS_CTRL, NR/SS) tames inrush and sequences the rail, a power-good flag reports regulation, and the fast transient response holds the output steady under load steps. The output is set by an external divider at FB. A clean-up regulator for ADC, PLL, and oscillator supplies fed from a noisy source.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output. Tie to pin 2 (both are OUT). A 10 µF or greater capacitor must be connected from this pin to GND for stability. Output range 0.8 V to 5.2 V, up to 1 A. |
| 2 | OUT | power_out | Regulated output (paralleled with pin 1). Requires a 10 µF or greater output capacitor to GND for loop stability. |
| 3 | FB | input | Feedback pin. Input to the control-loop error amplifier; regulated to VREF = 0.8 V. Used with an external resistor divider from OUT to GND to set VOUT (VOUT = 0.8 V × (1 + R1/R2)). |
| 4 | GND | power_in | Device ground. Connect to the device thermal pad and to the PCB ground plane. |
| 5 | PG | output | Open-drain power-good indicator for the LDO output. Requires a 10 kΩ to 100 kΩ external pull-up resistor. PG asserts low when VOUT falls below ~88.9% of nominal. May be left floating or tied to GND if unused. |
| 6 | SS_CTRL | input | Soft-start control pin. Tie to GND or IN to select the NR/SS capacitor charging current (typ 6.2 µA). If no CNR/SS capacitor is used, SS_CTRL must be tied to GND to avoid output overshoot. |
| 7 | EN | input | Enable input. LDO is enabled when VEN ≥ VIH(EN) (typ 1.1 V, max 6.5 V) and disabled when VEN ≤ VIL(EN) (max 0.4 V). Must be tied to IN if the enable function is not used; do not float. |
| 8 | NR/SS | passive | Noise-reduction / soft-start pin. Connect an external capacitor (0-10 µF) to bypass the internal band-gap reference; reduces output noise to low levels and, together with SS_CTRL, sets the output ramp rate to limit inrush current. |
| 9 | IN | power_in | Input supply pin (paralleled with pin 10). Input range 1.4 V to 6.5 V. A 10 µF or greater input capacitor is required close to the pin. |
| 10 | IN | power_in | Input supply pin (paralleled with pin 9). Input range 1.4 V to 6.5 V; 10 µF or greater bypass capacitor required. |
| 11 | Thermal Pad | passive | Exposed die-attach pad on the package bottom. Must be soldered to the PCB ground plane for proper thermal performance; electrically connect to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Type | Low-noise LDO |
| Output current | 1 A |
| Noise | Low (uVrms-class) |
| PSRR | High across frequency |
| Soft-start | Programmable (SS_CTRL, NR/SS) |
| Extras | Power-good flag |
| Output | Adjustable (FB) |
| Package | VSON-10 |
Ordering variants
Same part, different packaging or reel option.
TPS7A9101DRBR (VSON-10)TPS7A9101DSKR (VSON-10, alt)
CAD (KiCad official)
- Symbol:
Regulator_Linear2:TPS7A91 (KiCad official) - Footprint:
Package_DFN_QFN:Texas_S-PDSO-N10_EP1.2x2mm - 3D model: VSON-10 (KiCad packages3D, STEP)
- 3D model files:
tps7a91-etched.step/tps7a91-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a91.step/tps7a91.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
c6f72e9e3a061a41, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).