component
TPS7A8901RTJT
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7A8901RTJT
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · QFN-20-EP(4x4)
TPS7A8901RTJT from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | power_in | Input supply pin for LDO 1; a 10 µF or greater input capacitor is required, placed as close to the input as possible. |
| 2 | IN1 | power_in | Input supply pin for LDO 1; a 10 µF or greater input capacitor is required, placed as close to the input as possible. |
| 3 | GND | power_in | Ground pin that must be connected to the thermal pad, to the other GND pins, and to ground with a low-impedance connection. |
| 4 | IN2 | power_in | Input supply pin for LDO 2; a 10 µF or greater input capacitor is required, placed as close to the input as possible. |
| 5 | IN2 | power_in | Input supply pin for LDO 2; a 10 µF or greater input capacitor is required, placed as close to the input as possible. |
| 6 | EN2 | input | Enable pin for channel 2; VEN2 ≥ VIH(EN2) enables the regulator and VEN2 ≤ VIL(EN2) disables it, and it must be connected to IN2 if the enable function is not used. |
| 7 | NR/SS2 | passive | Noise-reduction and soft-start capacitor connection for channel 2; a 10 nF or larger capacitor to GND is recommended, placed as close to the pin as possible. |
| 8 | SS_CTRL2 | input | Soft-start control for channel 2; connect to GND or IN2 to select normal or fast charging of the NR/SS2 capacitor, and to GND if no capacitor is used to avoid output overshoot. |
| 9 | PG2 | output | Open-drain power-good indicator for LDO 2; requires a 10-kΩ to 100-kΩ external pullup resistor and may be left floating or tied to GND if not used. |
| 10 | FB2 | input | Feedback input to the channel 2 error amplifier; a 10 nF feed-forward capacitor to OUT2 is recommended but not required, and it can disrupt PG2 operation. |
| 11 | OUT2 | power_out | Regulated output for LDO 2; requires a 22 µF or larger ceramic capacitor (10 µF or greater effective) to ground placed as close to the output as possible. |
| 12 | OUT2 | power_out | Regulated output for LDO 2; requires a 22 µF or larger ceramic capacitor (10 µF or greater effective) to ground placed as close to the output as possible. |
| 13 | GND | power_in | Ground pin that must be connected to the thermal pad, to the other GND pins, and to ground with a low-impedance connection. |
| 14 | OUT1 | power_out | Regulated output for LDO 1; requires a 22 µF or larger ceramic capacitor (10 µF or greater effective) to ground placed as close to the output as possible. |
| 15 | OUT1 | power_out | Regulated output for LDO 1; requires a 22 µF or larger ceramic capacitor (10 µF or greater effective) to ground placed as close to the output as possible. |
| 16 | FB1 | input | Feedback input to the channel 1 error amplifier; a 10 nF feed-forward capacitor to OUT1 is recommended but not required, and it can disrupt PG1 operation. |
| 17 | PG1 | output | Open-drain power-good indicator for LDO 1; requires a 10-kΩ to 100-kΩ external pullup resistor and may be left floating or tied to GND if not used. |
| 18 | SS_CTRL1 | input | Soft-start control for channel 1; connect to GND or IN1 to select normal or fast charging of the NR/SS1 capacitor, and to GND if no capacitor is used to avoid output overshoot. |
| 19 | NR/SS1 | passive | Noise-reduction and soft-start capacitor connection for channel 1; a 10 nF or larger capacitor to GND is recommended, placed as close to the pin as possible. |
| 20 | EN1 | input | Enable pin for channel 1; VEN1 ≥ VIH(EN1) enables the regulator and VEN1 ≤ VIL(EN1) disables it, and it must be connected to IN1 if the enable function is not used. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-20-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS7A8901RTJT - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
tps7a8901rtjt-etched.step/tps7a8901rtjt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a8901rtjt.step/tps7a8901rtjt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
0597c8be312f6b57, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).