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Contents

README

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TPS7A8300RGWR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · QFN-20-EP(5x5)

TPS7A8300RGWR from Texas Instruments, in a QFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulated output pin; 22-μF or larger ceramic capacitor required for stability.
2 SNS input Output voltage sense input pin; connect only if ANY-OUT feature is used.
3 FB input Output voltage feedback pin connected to error amplifier; 10-nF feed-forward capacitor from FB to OUT recommended for low-noise applications.
4 PG tri_state Active-high power-good open-drain output indicating when output voltage reaches 89% of target.
5 50mV input Output voltage setting pin; connect to ground to increase output voltage by 50mV or leave floating.
6 100mV input Output voltage setting pin; connect to ground to increase output voltage by 100mV or leave floating.
7 200mV input Output voltage setting pin; connect to ground to increase output voltage by 200mV or leave floating.
8 GND power_in Ground pin.
9 400mV input Output voltage setting pin; connect to ground to increase output voltage by 400mV or leave floating.
10 800mV input Output voltage setting pin; connect to ground to increase output voltage by 800mV or leave floating.
11 1.6V input Output voltage setting pin; connect to ground to increase output voltage by 1.6V or leave floating.
12 BIAS power_in BIAS supply voltage pin for use when 1.1V ≤ VIN ≤ 1.4V; connect 10-µF capacitor between this pin and ground.
13 NR/SS input Noise-reduction and soft-start pin; connect external capacitor to ground to reduce reference voltage noise and enable soft-start function.
14 EN input Enable pin; logic high enables device, logic low disables device.
15 IN power_in Input supply voltage pin; 10-μF input ceramic capacitor required.
16 IN power_in Input supply voltage pin; 10-μF input ceramic capacitor required.
17 IN power_in Input supply voltage pin; 10-μF input ceramic capacitor required.
18 GND power_in Ground pin.
19 OUT output Regulated output pin; 22-μF or larger ceramic capacitor required for stability.
20 OUT output Regulated output pin; 22-μF or larger ceramic capacitor required for stability.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20-EP(5x5)
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS7A8300RGWR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm
  • 3D model: QFN-20-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tps7a8300rgwr-etched.step / tps7a8300rgwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a8300rgwr.step / tps7a8300rgwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 31bc3e5222f7a645, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF