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Initial commit: component/tps7a8300argrt

Ray ·3dde29cf46 ·1d ago
2 files changed +335
README.mdadded+58
@@ -0,0 +1,58 @@+# TPS7A8300ARGRT++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VQFN-20-EP(3.5x3.5)++TPS7A8300ARGRT from Texas Instruments, in a VQFN-20-EP(3.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | output | Regulated output pin; requires 47µF or larger ceramic capacitor to ground for stability. |+| 2 | SNS | input | Output voltage sense input pin; connect to load-side output trace only if ANY-OUT feature is used. |+| 3 | FB | input | Feedback input to error amplifier; optional 10nF feed-forward capacitor from FB to OUT maximizes AC performance. |+| 4 | PG | output | Active-high open-drain power-good output; requires 10-100kΩ pull-up resistor. |+| 5 | 50mV | input | ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 50mV resolution. |+| 6 | 100mV | input | ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 100mV resolution. |+| 7 | 200mV | input | ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 200mV resolution. |+| 8 | GND | power_in | Ground pin; connect to ground plane, thermal pad, and pin 18 with low-impedance connection. |+| 9 | 400mV | input | ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 400mV resolution. |+| 10 | 800mV | input | ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 800mV resolution. |+| 11 | 1.6V | input | ANY-OUT voltage setting pin for TPS7A8300A; connect to GND, SNS, or leave floating for 1.6V resolution. |+| 12 | BIAS | power_in | Bias supply voltage input (3.0V to 6.5V); enables low-input, low-output operation; requires 1µF minimum capacitor to ground. |+| 13 | NR/SS | passive | Noise-reduction and soft-start pin; connect 10nF or larger capacitor to ground to reduce reference noise and enable soft-start. |+| 14 | EN | input | Enable control input; drive to logic high to enable device, logic low to disable; connect to IN or BIAS if not required. |+| 15 | IN | power_in | Input supply voltage (1.1V to 6.5V); requires 10µF or larger ceramic capacitor to ground. |+| 16 | IN | power_in | Input supply voltage; paralleled with pins 15 and 17 for improved current distribution. |+| 17 | IN | power_in | Input supply voltage; paralleled with pins 15 and 16 for improved current distribution. |+| 18 | GND | power_in | Ground pin; connect to ground plane, thermal pad, and pin 8 with low-impedance connection. |+| 19 | OUT | output | Regulated output pin; paralleled with pins 1 and 20 for improved current distribution to load. |+| 20 | OUT | output | Regulated output pin; paralleled with pins 1 and 19 for improved current distribution to load. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-20-EP(3.5x3.5) |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `TPS7A8300ARGRT`+- Footprint: `Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm`+- 3D model: VQFN-20-EP(3.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `tps7a8300argrt-etched.step` / `tps7a8300argrt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a8300argrt.step` / `tps7a8300argrt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7a83a) (63 pp, sha256 `4b23b1f5239092dc`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps7a8300argrt-datasheet.pdf)
page.jsonadded+277
@@ -0,0 +1,277 @@+{+  "slug": "tps7a8300argrt",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, VQFN-20-EP(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps7a8300argrt",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps7a8300argrt.kicad_sym",+    "tps7a8300argrt.kicad_mod",+    "tps7a8300argrt.glb",+    "tps7a8300argrt.step",+    "tps7a8300argrt.lbr",+    "docs/hero.png",+    "docs/tps7a8300argrt-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps7a8300argrt-hero.glb",+    "tps7a8300argrt-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS7A8300ARGRT",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-20-EP(3.5x3.5)",+    "pin_count": 21,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps7a83a",+    "parts": {+      "symbol": "tps7a8300argrt.kicad_sym",+      "footprint": "tps7a8300argrt.kicad_mod",+      "model_3d": "tps7a8300argrt-hero.glb",+      "model_3d_plain": "tps7a8300argrt.glb",+      "model_3d_step": "tps7a8300argrt-etched.step",+      "model_3d_step_plain": "tps7a8300argrt.step",+      "lbr": "tps7a8300argrt.lbr"+    },+    "distributor_links": {+      "lcsc": "C2871311",+      "digikey": "296-47003-2-ND",+      "mouser": "595-TPS7A8300ARGRT"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T01:32:54Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-47003-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-TPS7A8300ARGRT",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT",+        "type": "output",+        "description": "Regulated output pin; requires 47µF or larger ceramic capacitor to ground for stability."+      },+      {+        "number": "2",+        "name": "SNS",+        "type": "input",+        "description": "Output voltage sense input pin; connect to load-side output trace only if ANY-OUT feature is used."+      },+      {+        "number": "3",+        "name": "FB",+        "type": "input",+        "description": "Feedback input to error amplifier; optional 10nF feed-forward capacitor from FB to OUT maximizes AC performance."+      },+      {+        "number": "4",+        "name": "PG",+        "type": "output",+        "description": "Active-high open-drain power-good output; requires 10-100kΩ pull-up resistor."+      },+      {+        "number": "5",+        "name": "50mV",+        "type": "input",+        "description": "ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 50mV resolution."+      },+      {+        "number": "6",+        "name": "100mV",+        "type": "input",+        "description": "ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 100mV resolution."+      },+      {+        "number": "7",+        "name": "200mV",+        "type": "input",+        "description": "ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 200mV resolution."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground pin; connect to ground plane, thermal pad, and pin 18 with low-impedance connection."+      },+      {+        "number": "9",+        "name": "400mV",+        "type": "input",+        "description": "ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 400mV resolution."+      },+      {+        "number": "10",+        "name": "800mV",+        "type": "input",+        "description": "ANY-OUT voltage setting pin; connect to GND, SNS, or leave floating to set output with 800mV resolution."+      },+      {+        "number": "11",+        "name": "1.6V",+        "type": "input",+        "description": "ANY-OUT voltage setting pin for TPS7A8300A; connect to GND, SNS, or leave floating for 1.6V resolution."+      },+      {+        "number": "12",+        "name": "BIAS",+        "type": "power_in",+        "description": "Bias supply voltage input (3.0V to 6.5V); enables low-input, low-output operation; requires 1µF minimum capacitor to ground."+      },+      {+        "number": "13",+        "name": "NR/SS",+        "type": "passive",+        "description": "Noise-reduction and soft-start pin; connect 10nF or larger capacitor to ground to reduce reference noise and enable soft-start."+      },+      {+        "number": "14",+        "name": "EN",+        "type": "input",+        "description": "Enable control input; drive to logic high to enable device, logic low to disable; connect to IN or BIAS if not required."+      },+      {+        "number": "15",+        "name": "IN",+        "type": "power_in",+        "description": "Input supply voltage (1.1V to 6.5V); requires 10µF or larger ceramic capacitor to ground."+      },+      {+        "number": "16",+        "name": "IN",+        "type": "power_in",+        "description": "Input supply voltage; paralleled with pins 15 and 17 for improved current distribution."+      },+      {+        "number": "17",+        "name": "IN",+        "type": "power_in",+        "description": "Input supply voltage; paralleled with pins 15 and 16 for improved current distribution."+      },+      {+        "number": "18",+        "name": "GND",+        "type": "power_in",+        "description": "Ground pin; connect to ground plane, thermal pad, and pin 8 with low-impedance connection."+      },+      {+        "number": "19",+        "name": "OUT",+        "type": "output",+        "description": "Regulated output pin; paralleled with pins 1 and 20 for improved current distribution to load."+      },+      {+        "number": "20",+        "name": "OUT",+        "type": "output",+        "description": "Regulated output pin; paralleled with pins 1 and 19 for improved current distribution to load."+      },+      {+        "number": "21",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "exposed pad 21 added from the footprint"+        ],+        "pages_sent": 13,+        "cost_usd": 0.1617,+        "at": "2026-10-07T01:32:26"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps7a83a",+        "pages": 63,+        "sha256": "4b23b1f5239092dc",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 21,+        "described": 21,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps7a8300argrt.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          3.52,+          3.52,+          0.9+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "8602976adf55cad32711e37d6b217e12102fd102ded1f23e870d0dfb38f1997e",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps7a8300argrt-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          3.52,+          3.52,+          0.9+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "796525688fbc746a92a8875bfcf5b968959341dde30d76f3803405705a21c22d",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file