component
TPS7A8050DRBR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, VSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS7A8050DRBR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VSON-8-EP(3x3)
TPS7A8050DRBR from Texas Instruments, in a VSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output; requires 4.7-μF or larger external capacitor of any type for stability. |
| 2 | OUT | power_out | Regulator output; requires 4.7-μF or larger external capacitor of any type for stability. |
| 3 | FB/SNS | input | Output voltage sense pin (fixed versions only); connect close to the load to minimize trace resistive drop and trace inductance. |
| 4 | GND | power_in | Ground connection. |
| 5 | EN | input | Enable input; drive high to enable regulator, low for shutdown; must not be left floating. |
| 6 | NR | passive | Noise reduction pin; connect external capacitor to ground to reduce output noise and slow down VOUT ramp. |
| 7 | IN | power_in | Unregulated input supply. |
| 8 | IN | power_in | Unregulated input supply. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSON-8-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS7A8050DRBR - Footprint:
Package_SON:VSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm - 3D model: VSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps7a8050drbr-etched.step/tps7a8050drbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a8050drbr.step/tps7a8050drbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
262840747211e70e, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS7A8050DRBR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VSON-8-EP(3x3)
TPS7A8050DRBR from Texas Instruments, in a VSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output; requires 4.7-μF or larger external capacitor of any type for stability. |
| 2 | OUT | power_out | Regulator output; requires 4.7-μF or larger external capacitor of any type for stability. |
| 3 | FB/SNS | input | Output voltage sense pin (fixed versions only); connect close to the load to minimize trace resistive drop and trace inductance. |
| 4 | GND | power_in | Ground connection. |
| 5 | EN | input | Enable input; drive high to enable regulator, low for shutdown; must not be left floating. |
| 6 | NR | passive | Noise reduction pin; connect external capacitor to ground to reduce output noise and slow down VOUT ramp. |
| 7 | IN | power_in | Unregulated input supply. |
| 8 | IN | power_in | Unregulated input supply. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSON-8-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `TPS7A8050DRBR`
- Footprint: `Package_SON:VSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm`
- 3D model: VSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps7a8050drbr-etched.step` / `tps7a8050drbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a8050drbr.step` / `tps7a8050drbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/ds/symlink/tps7a80.pdf) (31 pp, sha256 `262840747211e70e`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps7a8050drbr-datasheet.pdf)