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Contents

README

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TPS7A7200RGWR

Texas Instruments · Linear Voltage Regulators (LDO) · VQFN-20-EP(5x5)

TPS7A7200RGWR from Texas Instruments, in a VQFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage pin; 4.7 μF minimum capacitance required for stability.
2 SNS input Output voltage sense input pin connected to error amplifier.
3 FB input Feedback input to error amplifier; 220-pF ceramic capacitor from this pin to OUT required.
4 PG output Open-drain active-high power-good output; indicates when VOUT reaches 90% of target.
5 50mV input Voltage setting pin; ground connection increases VOUT by 50 mV, leave floating when not in use.
6 100mV input Voltage setting pin; ground connection increases VOUT by 100 mV, leave floating when not in use.
7 200mV input Voltage setting pin; ground connection increases VOUT by 200 mV, leave floating when not in use.
8 GND power_in Ground pin; must be connected to large-area ground plane.
9 400mV input Voltage setting pin; ground connection increases VOUT by 400 mV, leave floating when not in use.
10 800mV input Voltage setting pin; ground connection increases VOUT by 800 mV, leave floating when not in use.
11 1.6V input Voltage setting pin; ground connection increases VOUT by 1.6 V, leave floating when not in use.
12 NC unconnected Not internally connected; pin and thermal pad must be connected to large-area ground plane.
13 SS input Soft-start pin; leave open for default soft start or connect external capacitor to GND for adjustable soft-start delay.
14 EN input Enable pin; VIH ≥ 1.1 V enables device, VIL ≤ 0.5 V disables device.
15 IN power_in Unregulated supply voltage input pin; input capacitor required.
16 IN power_in Unregulated supply voltage input pin; input capacitor required.
17 IN power_in Unregulated supply voltage input pin; input capacitor required.
18 GND power_in Ground pin; must be connected to large-area ground plane.
19 OUT power_out Regulated output voltage pin; 4.7 μF minimum capacitance required for stability.
20 OUT power_out Regulated output voltage pin; 4.7 μF minimum capacitance required for stability.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-20-EP(5x5)
Category Power Supply Chip
Pins 21

CAD (KiCad official)

  • Symbol: TPS7A7200RGWR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm
  • 3D model: VQFN-20-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tps7a7200rgwr-etched.step / tps7a7200rgwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a7200rgwr.step / tps7a7200rgwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 5cbf29e76f81c0a6, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF