component
TPS7A6950QDRQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7A6950QDRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS7A6950QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input power-supply voltage; the unregulated input operates from 4 V to 40 V, with absolute maximum 45 V (withstands 45 V for 200 ms). |
| 2 | SI | input | Sense input to supervise input voltage, connected through an external voltage divider to VIN and GND; high-voltage I/O range 0 V to 40 V. |
| 3 | NC | unconnected | Not-connected pin with no internal connection. |
| 4 | CT | output | Reset-pulse delay adjustment; a capacitor from this pin to GND sets the PG reset delay, with CT pin voltage rated 0 V to 20 V (absolute maximum 25 V). |
| 5 | GND | power_in | Ground reference. |
| 6 | PG | output | Power-good open-drain output that must connect to VOUT via an external resistor, going logic high when VOUT is above the power-on-reset threshold; low-voltage I/O range 0 V to 5.5 V. |
| 7 | SO | output | Sense open-drain output that must connect to VOUT via an external resistor, going logic low when VSI falls below the sense-low threshold; low-voltage I/O range 0 V to 5.5 V. |
| 8 | VOUT | power_out | Regulated output voltage, 1.5 V to 5.5 V recommended operating range with absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS7A6950QDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps7a6950qdrq1-etched.step/tps7a6950qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a6950qdrq1.step/tps7a6950qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
f851d4872d5fd0bc, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).