component
TPS7A6650QDGNRQ1
Public Made by Adomby adom
Texas Instruments Linear Voltage Regulators (LDO), HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
TPS7A6650QDGNRQ1
Texas Instruments · Linear Voltage Regulators (LDO) · HVSSOP-8
TPS7A6650QDGNRQ1 from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input power-supply voltage; 4V to 40V operating range, maximum 45V. |
| 2 | EN | input | Enable input; device enters standby when EN voltage falls below enable threshold. |
| 3 | NC | unconnected | No internal connection. |
| 4 | CT | output | Reset-pulse delay adjustment; connect capacitor from this pin to GND to set PG reset pulse delay. |
| 5 | GND | power_in | Ground reference. |
| 6 | PG | output | Power-good open-drain output; high when VOUT is above power-on-reset threshold. |
| 7 | FB/DNC | input | Feedback input for external resistor divider in adjustable output mode, or DNC (do not connect) in fixed output mode. |
| 8 | VOUT | output | Regulated output voltage; 1.5V to 5.5V operating range. |
| 9 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSSOP-8 |
| Category | Power Supply Chip |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS7A6650QDGNRQ1 - Footprint:
Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm - 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps7a6650qdgnrq1-etched.step/tps7a6650qdgnrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a6650qdgnrq1.step/tps7a6650qdgnrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
b593f447bf65095e, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS7A6650QDGNRQ1
**Texas Instruments** · Linear Voltage Regulators (LDO) · HVSSOP-8
TPS7A6650QDGNRQ1 from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input power-supply voltage; 4V to 40V operating range, maximum 45V. |
| 2 | EN | input | Enable input; device enters standby when EN voltage falls below enable threshold. |
| 3 | NC | unconnected | No internal connection. |
| 4 | CT | output | Reset-pulse delay adjustment; connect capacitor from this pin to GND to set PG reset pulse delay. |
| 5 | GND | power_in | Ground reference. |
| 6 | PG | output | Power-good open-drain output; high when VOUT is above power-on-reset threshold. |
| 7 | FB/DNC | input | Feedback input for external resistor divider in adjustable output mode, or DNC (do not connect) in fixed output mode. |
| 8 | VOUT | output | Regulated output voltage; 1.5V to 5.5V operating range. |
| 9 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSSOP-8 |
| Category | Power Supply Chip |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `TPS7A6650QDGNRQ1`
- Footprint: `Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm`
- 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps7a6650qdgnrq1-etched.step` / `tps7a6650qdgnrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a6650qdgnrq1.step` / `tps7a6650qdgnrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7a66-q1) (38 pp, sha256 `b593f447bf65095e`, retrieved 2026-10-01, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps7a6650qdgnrq1-datasheet.pdf)