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Contents

README

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TPS7A6601QDGNRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HVSSOP-8

TPS7A6601QDGNRQ1 from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated input power supply voltage; 4V to 40V operating range with 45V transient maximum for 200ms.
2 EN input Device enable input; device enters 2µA shutdown mode when EN voltage falls below 0.85V typical threshold.
3 NC unconnected No internal connection; leave unconnected externally.
4 CT output Reset-pulse delay timing capacitor pin (0V to 25V maximum); connect external capacitor from this pin to GND to adjust power-on reset delay.
5 GND power_in Ground reference; negative terminal of supply and return path for all device and load currents.
6 PG tri_state Power-good open-drain output (maximum 5.5V); pulls low when VOUT falls below 91.6% of programmed voltage threshold; requires external pullup resistor connection to VOUT.
7 FB/DNC input Feedback input for adjustable output (1.5V to 5V via external resistor divider, maximum 5.5V absolute) or do-not-connect for fixed 3.3V/5V output mode.
8 VOUT output Regulated output voltage (1.5V to 5.5V selectable, 150mA maximum output current, 300mV typical dropout at 150mA with 4V input); requires 2.2µF to 100µF low-ESR ceramic capacitor to GND.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HVSSOP-8
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: TPS7A6601QDGNRQ1
  • Footprint: Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm
  • 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps7a6601qdgnrq1-etched.step / tps7a6601qdgnrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a6601qdgnrq1.step / tps7a6601qdgnrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 f851d4872d5fd0bc, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF