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TPS7A6201QKTTRQ1
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Texas Instruments Linear Voltage Regulators (LDO), TO-263-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7A6201QKTTRQ1
Texas Instruments · Linear Voltage Regulators (LDO) · TO-263-5
TPS7A6201QKTTRQ1 from Texas Instruments, in a TO-263-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input voltage pin (7 V to 40 V operating, 45 V transient) that needs a bypass capacitor to GND to dampen input line transients. |
| 2 | EN | input | High-voltage-tolerant enable input with internal pulldown; high turns the regulator on (VIH 2.5 V to 40 V, VIL max 0.8 V), can be tied to VIN, and the device stays disabled if left unconnected. |
| 3 | GND | power_in | Signal ground pin of the IC. |
| 4 | FB | input | Feedback pin where the external resistor divider to ground programs the output voltage (VREF = 1.23 V typical, 2.5 V to 7 V output). |
| 5 | VOUT | power_out | Regulated output pin with output current limitation (300 mA max) that needs a low-ESR output capacitor to GND (10 µF to 47 µF recommended) for stable operation. |
| 6 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-263-5 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute max VIN, VEN unregulated inputs | VIN, VEN | -0.3 | 45 | V | Duration less than 480 ms | 3 | |
| Absolute max regulated output voltage | VOUT | 7 | V | 3 | |||
| Absolute max feedback voltage | VFB | -0.3 | 7 | V | 3 | ||
| Operating ambient temperature | TOP | -40 | 125 | °C | 3 | ||
| Lead temperature | TLEAD | 260 | °C | Soldering, 10 s | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model, per ANSI/ESDA/JEDEC JS-001 | 3 | |
| Unregulated input voltage | VIN | 7 | 40 | V | VIN can go down to 4 V for 130 ms or less and remain functional | 4 | |
| Enable pin voltage | VEN | 4 | 40 | V | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Input voltage | VIN | 7 | 40 | V | VIN = 14 V, TJ = -40ºC to 150ºC | 4 | |
| Quiescent current | IQUIESCENT | 25 | 40 | µA | VIN = 8.2 V to 18 V, VEN = 5 V, IOUT = 0.01 mA to 0.75 mA | 4 | |
| Sleep/shutdown current | ISLEEP | 3 | µA | VIN = 8.2 V to 18 V, VEN < 0.8 V, IOUT = 0 mA (no load), TA = 125°C | 4 | ||
| Logic input low level | VIL | 0 | 0.8 | V | 4 | ||
| Logic input high level | VIH | 2.5 | 40 | V | 4 | ||
| Internal reference voltage tolerance | VREF | -2 | 2 | % | IOUT = 10 mA to 300 mA, VIN= VOUT + 1 V to 16 V | 4 | |
| Line regulation, VOUT = 7 V | ∆VLINE-REG | 15 | mV | VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 7 V | 4 | ||
| Line regulation, VOUT = 3.3 V | ∆VLINE-REG | 20 | mV | VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 3.3 V | 4 | ||
| Load regulation, VOUT = 7 V | ∆VLOAD-REG | 25 | mV | IOUT = 10 mA to 300 mA, VIN= 14 V, VOUT = 7 V | 4 | ||
| Load regulation, VOUT = 3.3 V | ∆VLOAD-REG | 35 | mV | IOUT = 10 mA to 300 mA,VIN = 14 V, VOUT = 3.3 V | 4 | ||
| Dropout voltage at 250 mA | VDROPOUT | 500 | mV | IOUT = 250 mA | 5 | ||
| Dropout voltage at 150 mA | VDROPOUT | 300 | mV | IOUT = 150 mA | 5 | ||
| Output current | IOUT | 0 | 300 | mA | VOUT in regulation | 5 | |
| Output current limit | ICL | 350 | 1000 | mA | VOUT = 0 V (VOUT pin is shorted to ground) | 5 | |
| PSRR at 100 Hz | PSRR | 60 | dB | VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 100 Hz, VOUT = 5 V and VOUT = 3.3 V | 5 | ||
| PSRR at 150 kHz | PSRR | 30 | dB | VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 150 kHz, VOUT = 5 V and VOUT = 3.3 V | 5 | ||
| Operating junction temperature | TJ | -40 | 150 | ºC | 5 | ||
| Undervoltage lockout voltage | VIN-UVLO | 3.16 | V | Ramp VIN down until output is turned OFF | 4 | ||
| Power-up voltage | VIN(POWERUP) | 3.45 | V | Ramp VIN up until output is turned ON | 4 | ||
| Switch resistance | RSW | 2 | Ω | VIN to VOUT resistance | 5 | ||
| Thermal shutdown trip point | TSHUTDOWN | 165 | ºC | 5 | |||
| Thermal shutdown hysteresis | THYST | 10 | ºC | 5 | |||
| Junction-to-ambient thermal resistance, High-K | RθJA | 30.2 | °C/W | High-K, JESD 51-5 | 4 | ||
| Junction-to-ambient thermal resistance, Low-K | RθJA | 34.4 | °C/W | Low-K, JESD 51-3 | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 38.9 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 7.4 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 3.8 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 7.4 | °C/W | 4 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 1.5 | °C/W | 4 | |||
| Thermal impedance junction to exposed pad | θJP | 10.4 | °C/W | KTT (D2PAK) package | 4 |
CAD (KiCad official)
- Symbol:
TPS7A6201QKTTRQ1 - Footprint:
Package_TO_SOT_SMD:TO-263-5_TabPin6 - 3D model: TO-263-5 (KiCad packages3D, STEP)
- 3D model files:
tps7a6201qkttrq1-etched.step/tps7a6201qkttrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a6201qkttrq1.step/tps7a6201qkttrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
9572f1568e1dc040, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).