component
TPS7A6050QKVURQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS7A6050QKVURQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-4
TPS7A6050QKVURQ1 from Texas Instruments, in a TO-252-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input voltage pin, specified at 7 V to 40 V with transients to 45 V (absolute maximum 45 V), and a bypass capacitor is connected between VIN and GND to dampen input line transients. |
| 2 | nRST | output | Open-drain reset output that requires an external pullup resistor to VOUT, with an absolute maximum rating of 7 V. |
| 3 | GND | power_in | Signal-ground pin of the IC, to which the input and output capacitors are referenced. |
| 4 | RDELAY | output | Reset delay timer pin for the TPS7A6050-Q1 (no ENABLE pin on this variant), where an external capacitor CDLY to ground programs the reset delay, with an absolute maximum rating of 7 V. |
| 5 | VOUT | power_out | Regulated 5 V output pin with a limited maximum output current of 300 mA, which requires an external low-ESR output capacitor COUT to GND for stable operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-252-4 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TPS7A6050QKVURQ1 - Footprint:
Package_TO_SOT_SMD:TO-252-4 - 3D model: TO-252-4 (KiCad packages3D, STEP)
- 3D model files:
tps7a6050qkvurq1-etched.step/tps7a6050qkvurq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a6050qkvurq1.step/tps7a6050qkvurq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
e95579ec81481585, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS7A6050QKVURQ1
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-4
TPS7A6050QKVURQ1 from Texas Instruments, in a TO-252-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input voltage pin, specified at 7 V to 40 V with transients to 45 V (absolute maximum 45 V), and a bypass capacitor is connected between VIN and GND to dampen input line transients. |
| 2 | nRST | output | Open-drain reset output that requires an external pullup resistor to VOUT, with an absolute maximum rating of 7 V. |
| 3 | GND | power_in | Signal-ground pin of the IC, to which the input and output capacitors are referenced. |
| 4 | RDELAY | output | Reset delay timer pin for the TPS7A6050-Q1 (no ENABLE pin on this variant), where an external capacitor CDLY to ground programs the reset delay, with an absolute maximum rating of 7 V. |
| 5 | VOUT | power_out | Regulated 5 V output pin with a limited maximum output current of 300 mA, which requires an external low-ESR output capacitor COUT to GND for stable operation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TO-252-4 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `TPS7A6050QKVURQ1`
- Footprint: `Package_TO_SOT_SMD:TO-252-4`
- 3D model: TO-252-4 (KiCad packages3D, STEP)
- 3D model files: `tps7a6050qkvurq1-etched.step` / `tps7a6050qkvurq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a6050qkvurq1.step` / `tps7a6050qkvurq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7a60-q1) (36 pp, sha256 `e95579ec81481585`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps7a6050qkvurq1-datasheet.pdf)