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Initial commit: component/tps7a4701qrgwrq1

Ray ·08aa39529b ·9d ago
2 files changed +295
README.mdadded+58
@@ -0,0 +1,58 @@+# TPS7A4701QRGWRQ1++**Texas Instruments** · Linear Voltage Regulators (LDO) · VQFN-20-EP(5x5)++TPS7A4701QRGWRQ1 from Texas Instruments, in a VQFN-20-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | power_out | Regulator output pin; requires a capacitor ≥10 µF to ground for stability, with 47-µF ceramic capacitor highly recommended. |+| 2 | NC | unconnected | No connect pin; can be left open or tied to any voltage between GND and IN. |+| 3 | SENSE/FB | input | Control-loop error amplifier input; serves as SENSE pin in ANY-OUT mode (connect to OUT) or FB pin in adjustable mode with external resistors. |+| 4 | 6P4V2 | input | Program pin for ANY-OUT mode; when connected to GND, adds 6.4 V to nominal output voltage; only GND connection allowed. |+| 5 | 6P4V1 | input | Program pin for ANY-OUT mode; when connected to GND, adds 6.4 V to nominal output voltage; only GND connection allowed. |+| 6 | 3P2V | input | Program pin for ANY-OUT mode; when connected to GND, adds 3.2 V to nominal output voltage; only GND connection allowed. |+| 7 | GND | power_in | Ground connection. |+| 8 | 1P6V | input | Program pin for ANY-OUT mode; when connected to GND, adds 1.6 V to nominal output voltage; only GND connection allowed. |+| 9 | 0P8V | input | Program pin for ANY-OUT mode; when connected to GND, adds 0.8 V to nominal output voltage; only GND connection allowed. |+| 10 | 0P4V | input | Program pin for ANY-OUT mode; when connected to GND, adds 0.4 V to nominal output voltage; only GND connection allowed. |+| 11 | 0P2V | input | Program pin for ANY-OUT mode; when connected to GND, adds 0.2 V to nominal output voltage; only GND connection allowed. |+| 12 | 0P1V | input | Program pin for ANY-OUT mode; when connected to GND, adds 0.1 V to nominal output voltage; only GND connection allowed. |+| 13 | EN | input | Enable pin; device is enabled when voltage on this pin exceeds VEN(HI), can be tied to IN if independent enable control is not required. |+| 14 | NR | passive | Noise-reduction pin; requires capacitor ≥10 nF to GND for stability, 1-µF recommended to maximize ac performance and minimize output noise. |+| 15 | IN | power_in | Input supply pin; requires capacitor ≥1 µF to ground for stability, 10-µF recommended to reduce PCB layout sensitivity. |+| 16 | IN | power_in | Input supply pin; requires capacitor ≥1 µF to ground for stability, 10-µF recommended to reduce PCB layout sensitivity. |+| 17 | NC | unconnected | No connect pin; can be left open or tied to any voltage between GND and IN. |+| 18 | NC | unconnected | No connect pin; can be left open or tied to any voltage between GND and IN. |+| 19 | NC | unconnected | No connect pin; can be left open or tied to any voltage between GND and IN. |+| 20 | OUT | power_out | Regulator output pin; requires a capacitor ≥10 µF to ground for stability, with 47-µF ceramic capacitor highly recommended. |+| 21 | PowerPAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-20-EP(5x5) |+| Category | Power Supply Chip |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `TPS7A4701QRGWRQ1`+- Footprint: `Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm`+- 3D model: VQFN-20-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `tps7a4701qrgwrq1-etched.step` / `tps7a4701qrgwrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a4701qrgwrq1.step` / `tps7a4701qrgwrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7a47-q1) (31 pp, sha256 `e90305f495dd4c68`, retrieved 2026-09-26, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps7a4701qrgwrq1-datasheet.pdf)
page.jsonadded+237
@@ -0,0 +1,237 @@+{+  "slug": "tps7a4701qrgwrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Linear Voltage Regulators (LDO), VQFN-20-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power supply chip",+    "tps7a4701qrgwrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps7a4701qrgwrq1.kicad_sym",+    "tps7a4701qrgwrq1.kicad_mod",+    "tps7a4701qrgwrq1.glb",+    "tps7a4701qrgwrq1.step",+    "tps7a4701qrgwrq1.lbr",+    "docs/hero.png",+    "docs/tps7a4701qrgwrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TPS7A4701QRGWRQ1",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-20-EP(5x5)",+    "pin_count": 21,+    "category": "Power Supply Chip",+    "subcategory": "Linear Voltage Regulators (LDO)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps7a47-q1",+    "parts": {+      "symbol": "tps7a4701qrgwrq1.kicad_sym",+      "footprint": "tps7a4701qrgwrq1.kicad_mod",+      "model_3d": "tps7a4701qrgwrq1-etched.glb",+      "model_3d_plain": "tps7a4701qrgwrq1.glb",+      "model_3d_step": "tps7a4701qrgwrq1-etched.step",+      "model_3d_step_plain": "tps7a4701qrgwrq1.step",+      "lbr": "tps7a4701qrgwrq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C523803",+      "digikey": "296-48213-2-ND",+      "mouser": "595-TPS7A4701QRGWRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-09-26T16:06:27Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-48213-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS7A4701QRGWRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulator output pin; requires a capacitor ≥10 µF to ground for stability, with 47-µF ceramic capacitor highly recommended."+      },+      {+        "number": "2",+        "name": "NC",+        "type": "unconnected",+        "description": "No connect pin; can be left open or tied to any voltage between GND and IN."+      },+      {+        "number": "3",+        "name": "SENSE/FB",+        "type": "input",+        "description": "Control-loop error amplifier input; serves as SENSE pin in ANY-OUT mode (connect to OUT) or FB pin in adjustable mode with external resistors."+      },+      {+        "number": "4",+        "name": "6P4V2",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 6.4 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "5",+        "name": "6P4V1",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 6.4 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "6",+        "name": "3P2V",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 3.2 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground connection."+      },+      {+        "number": "8",+        "name": "1P6V",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 1.6 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "9",+        "name": "0P8V",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 0.8 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "10",+        "name": "0P4V",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 0.4 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "11",+        "name": "0P2V",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 0.2 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "12",+        "name": "0P1V",+        "type": "input",+        "description": "Program pin for ANY-OUT mode; when connected to GND, adds 0.1 V to nominal output voltage; only GND connection allowed."+      },+      {+        "number": "13",+        "name": "EN",+        "type": "input",+        "description": "Enable pin; device is enabled when voltage on this pin exceeds VEN(HI), can be tied to IN if independent enable control is not required."+      },+      {+        "number": "14",+        "name": "NR",+        "type": "passive",+        "description": "Noise-reduction pin; requires capacitor ≥10 nF to GND for stability, 1-µF recommended to maximize ac performance and minimize output noise."+      },+      {+        "number": "15",+        "name": "IN",+        "type": "power_in",+        "description": "Input supply pin; requires capacitor ≥1 µF to ground for stability, 10-µF recommended to reduce PCB layout sensitivity."+      },+      {+        "number": "16",+        "name": "IN",+        "type": "power_in",+        "description": "Input supply pin; requires capacitor ≥1 µF to ground for stability, 10-µF recommended to reduce PCB layout sensitivity."+      },+      {+        "number": "17",+        "name": "NC",+        "type": "unconnected",+        "description": "No connect pin; can be left open or tied to any voltage between GND and IN."+      },+      {+        "number": "18",+        "name": "NC",+        "type": "unconnected",+        "description": "No connect pin; can be left open or tied to any voltage between GND and IN."+      },+      {+        "number": "19",+        "name": "NC",+        "type": "unconnected",+        "description": "No connect pin; can be left open or tied to any voltage between GND and IN."+      },+      {+        "number": "20",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulator output pin; requires a capacitor ≥10 µF to ground for stability, with 47-µF ceramic capacitor highly recommended."+      },+      {+        "number": "21",+        "name": "PowerPAD",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: PowerPAD (thermal pad) is physically part of the VQFN-20-EP package and is internally connected to G",+          "exposed pad 21 added from the footprint"+        ],+        "pages_sent": 31,+        "cost_usd": 0.3409,+        "at": "2026-09-26T16:06:09"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps7a47-q1",+        "pages": 31,+        "sha256": "e90305f495dd4c68",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 21,+        "described": 21,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file