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README

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TPS7A4525DCQR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-6

TPS7A4525DCQR from Texas Instruments, in a SOT-223-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SHDN input Pulling SHDN low puts the regulator into a low-power shutdown with the output off; it accepts 5-V, 3-V or open-collector logic with a high level of 2 V to 20 V, a low level of 0.25 V maximum, and must be connected to IN if unused.
2 IN power_in Power input with a recommended range of VOUT + VDO to 20 V and an absolute range of -20 V to 20 V, where a 1 µF to 10 µF ceramic bypass capacitor is recommended if the device is more than six inches from the main input filter capacitor.
3 GND power_in Ground reference for the regulator, and the datasheet's exposed-thermal-pad soldering requirement is stated for the KTT package rather than the DCQ package.
4 OUT power_out Regulated output that supplies the load and requires a minimum 10 µF ceramic output capacitor to prevent oscillations, with larger capacitors needed for large transient loads.
5 SENSE input Error-amplifier sense input for the fixed 2.5 V version, optimally connected to OUT or to the load to remove trace drop, with a bias current of 600 µA at the rated output voltage and allowed to be pulled below ground.
6 GND power_in Additional ground pin that is present on the DCQ package only.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-223-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Absolute maximum IN pin voltage VIN -20 20 V Relative to GND 4
Absolute maximum OUT pin voltage VOUT -20 20 V Relative to GND 4
Absolute maximum input-to-output differential voltage -20 20 V See footnote 2: IN at 20 V, OUT not below 0 V; total IN to OUT not above ±20 V 4
Absolute maximum SENSE pin voltage VSENSE -20 20 V 4
Absolute maximum SHDN pin voltage VSHDN -20 20 V 4
Maximum lead temperature (10-s soldering time) Tlead 300 °C 10-s soldering time 4
Maximum junction temperature TJMAX 150 °C 4
Storage temperature Tstg -65 150 °C 4
Input voltage range VIN 20 V Minimum printed as VOUT + VDO (no numeric minimum) 4
SHDN high-level input voltage VIH 2 20 V 4
SHDN low-level input voltage VIL 0.25 V 4
Recommended operating junction temperature range TJ -40 125 °C Over operating free-air temperature range 4
Junction-to-ambient thermal resistance (DCQ, SOT-223) RθJA 50.5 °C/W SOT-223 (DCQ), 6 pins 5
Junction-to-case (top) thermal resistance (DCQ, SOT-223) RθJC(top) 31.1 °C/W SOT-223 (DCQ), 6 pins 5
Junction-to-board thermal resistance (DCQ, SOT-223) RθJB 5.1 °C/W SOT-223 (DCQ), 6 pins 5
Regulated output voltage, 25°C VOUT 2.475 2.5 2.525 V TPS7A4525; VIN = 3 V, ILOAD = 1 mA; 25°C 5
Regulated output voltage, full range VOUT 2.412 2.5 2.575 V TPS7A4525; VIN = 3.5 V to 20 V, ILOAD = 1 mA to 1.5 A; Full range (TJ = -40 to 125°C) 5
Minimum input voltage VIN 1.9 V ILOAD = 0.5 A; 25°C 5
Minimum input voltage VIN 2.1 2.5 V ILOAD = 1.5 A; Full range (TJ = -40 to 125°C) 5
Line regulation 3 10 mV TPS7A4525; ΔVIN = 3 V to 20 V, ILOAD = 1 mA; Full range (TJ = -40 to 125°C) 5
Load regulation 2.5 15 mV TPS7A4525; VIN = 3.5 V, ΔILOAD = 1 mA to 1.5 A; 25°C 6
Load regulation 30 mV TPS7A4525; VIN = 3.5 V, ΔILOAD = 1 mA to 1.5 A; Full range (TJ = -40 to 125°C) 6
Dropout voltage VDO 0.02 0.05 V VIN = VOUT(NOMINAL); ILOAD = 1 mA; 25°C 6
Dropout voltage VDO 0.06 V VIN = VOUT(NOMINAL); ILOAD = 1 mA; Full range (TJ = -40 to 125°C) 6
Dropout voltage VDO 0.085 0.1 V VIN = VOUT(NOMINAL); ILOAD = 100 mA; 25°C 6
Dropout voltage VDO 0.13 V VIN = VOUT(NOMINAL); ILOAD = 100 mA; Full range (TJ = -40 to 125°C) 6
Dropout voltage VDO 0.17 0.18 V VIN = VOUT(NOMINAL); ILOAD = 500 mA; 25°C 6
Dropout voltage VDO 0.25 V VIN = VOUT(NOMINAL); ILOAD = 500 mA; Full range (TJ = -40 to 125°C) 6
Dropout voltage VDO 0.3 0.35 V VIN = VOUT(NOMINAL); ILOAD = 1.5 A; 25°C 6
Dropout voltage VDO 0.45 V VIN = VOUT(NOMINAL); ILOAD = 1.5 A; Full range (TJ = -40 to 125°C) 6
GND pin current IGND 1 1.5 mA ILOAD = 0 mA; VIN = VOUT(NOMINAL) + 1 V; Full range (TJ = -40 to 125°C) 6
GND pin current IGND 1.1 1.6 mA ILOAD = 1 mA; VIN = VOUT(NOMINAL) + 1 V; Full range (TJ = -40 to 125°C) 6
GND pin current IGND 3.3 3.5 mA ILOAD = 100 mA; VIN = VOUT(NOMINAL) + 1 V; Full range (TJ = -40 to 125°C) 6
GND pin current IGND 15 17 mA ILOAD = 500 mA; VIN = VOUT(NOMINAL) + 1 V; Full range (TJ = -40 to 125°C) 6
GND pin current IGND 80 90 mA ILOAD = 1.5 A; VIN = VOUT(NOMINAL) + 1 V; Full range (TJ = -40 to 125°C) 6
Shutdown threshold, OFF to ON VSHDN 0.9 2 V VOUT = OFF to ON; Full range (TJ = -40 to 125°C) 6
Shutdown threshold, ON to OFF VSHDN 0.25 0.75 V VOUT = ON to OFF; Full range (TJ = -40 to 125°C) 6
SHDN pin current ISHDN 0.01 1 μA VSHDN = 0 V; 25°C 6
SHDN pin current ISHDN 3 20 μA VSHDN = 20 V; 25°C 6
Quiescent current in shutdown 0.01 1 μA VIN = 6 V, VSHDN = 0 V; 25°C 6
Current limit ILIMIT 1.6 A VIN = VOUT(NOMINAL) + 1; Full range (TJ = -40 to 125°C) 6
Input reverse leakage current IIL 300 μA VIN = -20 V, VOUT = 0 V; Full range (TJ = -40 to 125°C) 6
Reverse output current IRO 600 1000 μA TPS7A4525; VOUT = 2.5 V, VIN < 2.5 V; 25°C 7

CAD (KiCad official)

  • Symbol: TPS7A4525DCQR
  • Footprint: Package_TO_SOT_SMD:SOT-223-6
  • 3D model: SOT-223-6 (KiCad packages3D, STEP)
  • 3D model files: tps7a4525dcqr-etched.step / tps7a4525dcqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a4525dcqr.step / tps7a4525dcqr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 c8c2fe4b7b5bd34b, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF