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Contents

README

markdown

TPS7A4101DGNR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP

TPS7A4101DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulator output. A capacitor greater than 4.7 µF must be tied from this pin to ground to assure stability. Sources up to 50 mA at the programmed output voltage (VREF to 48 V).
2 FB input Feedback input to the control-loop error amplifier. Used with an external resistor divider to set the output voltage; internal reference VREF = 1.173 V (typ).
3 NC unconnected Not internally connected. This pin must either be left open or tied to GND.
4 GND power_in Ground reference for the device.
5 EN input Enable input. VEN >= VEN_HI (1.5 V min) enables the regulator; VEN <= VEN_LO (0.4 V max) disables it. If not used, EN can be connected to IN. VEN must not exceed VIN at any time.
6 NC unconnected Not internally connected. This pin must either be left open or tied to GND.
7 NC unconnected Not internally connected. This pin must either be left open or tied to GND.
8 IN power_in Input supply. Operating range 7 V to 50 V (absolute maximum 55 V). Bypass with a >= 1 µF capacitor to GND close to the pin.
9 PowerPAD passive Exposed thermal pad on the package underside. Internally connected to GND. Solder to the PCB and connect to the GND plane to enhance thermal performance; may be left floating but this is not recommended.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • TPS7A4101DGNR
  • TPS7A4101DGNRDGNT

CAD (KiCad official)

  • Symbol: TPS7A4101DGNR
  • Footprint: Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm
  • 3D model: MSOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: tps7a4101dgnr-etched.step / tps7a4101dgnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a4101dgnr.step / tps7a4101dgnr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps7a4101dgnr.step 114 KB You want the bare part, or you mark your own boards.
tps7a4101dgnr-etched.step 2.2 MB You want the part with TPS7A4101DGNR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 570 faces against 140 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 1362fd0bf4e99501, retrieved 2026-08-17, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF