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TPS7A2625DRVR

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps7a2625drvrfactory-2.0.0extractor-text

Verified TPS7A2625DRVR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 7 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS7A2625DRVR · WSON-6-EP(2x2) · 7 pins
  • ✓copper: 7 copper pads, none touching another net
  • ✓datasheet: all 7 pin names found in the 33-page datasheet
  • ✓distributor: lcsc C2867880, digikey 296-TPS7A2625DRVRTR-ND, mouser 595-TPS7A2625DRVR
  • ✓family: WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-bkckrklh/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 7 pins = 7 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 7 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps7a2625drvr.kicad_sym✓ tps7a2625drvr.kicad_mod✓ tps7a2625drvr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers tps7a2625drvr: viewers · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
tps7a2625drvr-etched.glb Publish 0.1.0 · Ray 1d ago
tps7a2625drvr-etched.step tps7a2625drvr: factory component page (tier=mfr) · Ray 1d ago
tps7a2625drvr-hero.glb tps7a2625drvr: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
tps7a2625drvr-hero.overlay.json Publish 0.1.0 · Ray 1d ago
tps7a2625drvr.glb Publish 0.1.0 · Ray 1d ago
tps7a2625drvr.kicad_mod Publish 0.1.0 · Ray 1d ago
tps7a2625drvr.kicad_sym Publish 0.1.0 · Ray 1d ago
tps7a2625drvr.lbr Publish 0.1.0 · Ray 1d ago
tps7a2625drvr.step Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 7 pins · Ray 1d ago

TPS7A2625DRVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TPS7A2625DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Output pin that requires a capacitor from OUT to ground for stability, with the datasheet giving 1 µF to 100 µF output capacitance in the Recommended Operating Conditions.
2 NC unconnected No internal connection on the fixed-voltage version; the pin can be floated, but thermal performance is better when it is tied to GND.
3 PG output Open-collector power-good output that must be pulled up externally; it goes high when VOUT exceeds VIT(PG,RISING) and is driven low when VOUT falls below VIT(PG,FALLING).
4 EN input Enable input: drive above VEN(HI) to enable the regulator and below VEN(LOW) to enter low-current shutdown; do not float this pin, and connect it to IN if unused.
5 GND power_in Ground pin; the input and output capacitors should be placed as close to the IN, OUT and GND pins as possible.
6 IN power_in Input supply pin with a recommended input capacitor of at least 1 µF from IN to ground, with the input voltage range given as 2.4 V to 18 V.
7 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage accuracy (fixed output versions) -1 1 % Fixed output versions 5
Line regulation ΔVOUT(ΔVIN) -0.1 0.1 % (VOUT(nom) + 0.8 V or 2.4 V) ≤ VIN ≤ 18 V 5
Load regulation ΔVOUT(ΔIOUT) -0.5 0.5 % 1 mA ≤ IOUT ≤ 500 mA 5
UVLO threshold rising VUVLO(RISING) 1.95 2.15 2.35 V VIN rising 5
UVLO threshold falling VUVLO(FALLING) 1.85 2.09 2.25 V VIN falling 5
Dropout voltage VDO 92 145 mV IOUT = 100 mA 5
Dropout voltage VDO 173 280 mV IOUT = 250 mA 5
Dropout voltage VDO 355 590 mV IOUT = 500 mA 5
Output current limit ICL 525 717 970 mA VOUT = 0.9 × VOUT(nom) 5
Ground pin current IGND 2 4.5 µA IOUT = 0 mA 5
Shutdown current ISHUTDOWN 325 600 nA VEN ≤ 0.4 V, VIN = 2.4 V, Iout = 0 mA 5
PG pin threshold rising VIT(PG,RISING) 93 96.5 %VOUT RPULLUP = 10 kΩ, VOUT rising, VIN ≥ VUVLO(RISING) 5
PG pin threshold falling VIT(PG,FALLING) 84 90 %VOUT RPULLUP = 10 kΩ, VOUT falling, VIN ≥ VUVLO(RISING) 5
PG pin low level output voltage VOL(PG) 0.4 V VOUT < VIT(PG,FALLING), IPG-SINK = 500 µA 5
PG pin leakage current ILKG(PG) 5 300 nA VOUT > VIT(PG,RISING), VPG = 18 V 5
Input voltage VIN -0.3 20 V 4
Output voltage VOUT -0.3 V VIN + 0.3 V or 20 V (whichever is smaller) 4
Enable voltage VEN -0.3 20 V 4
Power-good voltage VPG -0.3 20 V 4
Operating junction temperature TJ -50 150 °C 4
Storage temperature Tstg -65 150 °C 4
Input voltage VIN 2.4 18 V 4
Output voltage (fixed version) VOUT 1.25 5.5 V Fixed version 4
Output current IOUT 0 500 mA 4
Enable voltage VEN 0 18 V 4
Power-good voltage VPG 0 18 V 4
Output capacitor COUT 1 2.2 100 µF 4
Operating junction temperature TJ -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 73.3 °C/W DRV (WSON) package 4
Junction-to-case (top) thermal resistance RθJC(top) 90.6 °C/W DRV (WSON) package 4
Junction-to-board thermal resistance RθJB 38.3 °C/W DRV (WSON) package 4
Junction-to-top characterization parameter ΨJT 3.7 °C/W DRV (WSON) package 4
Junction-to-board characterization parameter ΨJB 38.4 °C/W DRV (WSON) package 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 14.3 °C/W DRV (WSON) package 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • Place input and output capacitors as close to the device pins as possible • Use copper planes for device connections to optimize thermal performance 23

CAD (KiCad official)

  • Symbol: TPS7A2625DRVR
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps7a2625drvr-etched.step / tps7a2625drvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a2625drvr.step / tps7a2625drvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 4d0b73c2b191e30f, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF