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TPS7A2033PDBVR

Public Made by Adom

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tps7a2033pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers tps7a2033pdbvr: viewers · Ray 1mo ago
package.json tps7a2033pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 11d ago
page.json tps7a2033pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 11d ago
README.md Initial commit: component/tps7a2033pdbvr · Ray 1mo ago
tps7a2033pdbvr-etched.fit.json tps7a2033pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps7a2033pdbvr-etched.glb tps7a2033pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 11d ago
tps7a2033pdbvr-etched.step tps7a2033pdbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 11d ago
tps7a2033pdbvr.glb Publish 0.1.0 · Ray 1mo ago
tps7a2033pdbvr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps7a2033pdbvr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps7a2033pdbvr.lbr Publish 0.1.0 · Ray 1mo ago
tps7a2033pdbvr.step Publish 0.1.0 · Ray 1mo ago

TPS7A2033PDBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS7A2033PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input voltage supply (1.6 V to 6.0 V); place 1 µF minimum ceramic capacitor close to IN and GND pins for transient response.
2 GND power_in Common ground connection.
3 EN input Enable input (active high); regulator output enabled when VEN > VEN(HI) = 0.9 V and disabled when VEN < VEN(LOW) = 0.3 V with 500 kΩ internal pulldown to ground.
4 N/C unconnected No internal electrical connection; leave unconnected or do not connect to any potential.
5 OUT output Regulated output voltage (0.8 V to 5.5 V); requires 1 µF minimum ESR ceramic output capacitor for stability and has 150 Ω internal pulldown resistor when device disabled.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS7A2033PDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps7a2033pdbvr-etched.step / tps7a2033pdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps7a2033pdbvr.step / tps7a2033pdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (63 pp, sha256 f865f163779e6948, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF