component
TPS7A1650DGNR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7A1650DGNR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS7A1650DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output pin; requires a capacitor ≥2.2 µF to GND for stability (10 µF ceramic recommended for best AC performance). |
| 2 | FB/DNC | unconnected | For the fixed-output TPS7A1650, this pin must not be connected to any electrical net, including GND or IN. |
| 3 | PG | output | Open-drain power-good output; pulls low when VOUT falls below the PG trip threshold, otherwise high-impedance; leave open or tie to GND if unused. |
| 4 | GND | power_in | Ground pin. |
| 5 | EN | input | Enable pin; regulator is enabled when VEN ≥ VEN_HI and disabled when VEN ≤ VEN_LO; can be tied to IN if unused (VEN ≤ VIN at all times). |
| 6 | NC | unconnected | No internal connection; may be left open or tied to any voltage between GND and IN. |
| 7 | DELAY | output | Delay pin; connect a capacitor to GND to set the programmable power-good delay time, or leave open if the reset/delay function is not needed. |
| 8 | IN | power_in | Regulator input supply pin; requires a capacitor ≥0.1 µF to GND for stability (10 µF ceramic recommended to reduce PCB layout sensitivity). |
| 9 | PowerPAD | power_in | Exposed thermal pad; should be soldered to the PCB and connected to the GND plane to enhance thermal performance (can be left floating but TI highly recommends GND connection). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS7A1650DGNR - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tps7a1650dgnr-etched.step/tps7a1650dgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a1650dgnr.step/tps7a1650dgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
180ec3f485b2772b, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).