component
TPS7A1115PDRVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS7A1115PDRVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(2x2)
TPS7A1115PDRVR from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output pin that requires a capacitor from OUT to ground for stability, with the recommended output capacitor range of 2.2 µF to 22 µF and ESR below 250 mΩ. |
| 2 | NC | unconnected | This pin is not internally connected and may be connected to ground for better thermal dissipation or left floating. |
| 3 | EN | input | Enable pin: logic high enables the device and logic low disables it, and connecting EN to IN is only acceptable if the IN pin voltage is greater than 0.9 V. |
| 4 | BIAS | input | Bias supply pin for low-input, low-output voltage operation, with a recommended bias capacitor of 0.1 µF from BIAS to ground and a bias voltage range of 1.7 V to 5.5 V. |
| 5 | GND | power_in | Ground pin that must be connected to ground. |
| 6 | IN | power_in | Primary input pin that requires a capacitor from IN to ground for stability, with an input voltage range of 0.75 V to 3.3 V and a recommended input capacitor of 2.2 µF. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
TPS7A1115PDRVR - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps7a1115pdrvr-etched.step/tps7a1115pdrvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7a1115pdrvr.step/tps7a1115pdrvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
af774819c7eef8dd, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS7A1115PDRVR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(2x2)
TPS7A1115PDRVR from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output pin that requires a capacitor from OUT to ground for stability, with the recommended output capacitor range of 2.2 µF to 22 µF and ESR below 250 mΩ. |
| 2 | NC | unconnected | This pin is not internally connected and may be connected to ground for better thermal dissipation or left floating. |
| 3 | EN | input | Enable pin: logic high enables the device and logic low disables it, and connecting EN to IN is only acceptable if the IN pin voltage is greater than 0.9 V. |
| 4 | BIAS | input | Bias supply pin for low-input, low-output voltage operation, with a recommended bias capacitor of 0.1 µF from BIAS to ground and a bias voltage range of 1.7 V to 5.5 V. |
| 5 | GND | power_in | Ground pin that must be connected to ground. |
| 6 | IN | power_in | Primary input pin that requires a capacitor from IN to ground for stability, with an input voltage range of 0.75 V to 3.3 V and a recommended input capacitor of 2.2 µF. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
## CAD (KiCad official)
- Symbol: `TPS7A1115PDRVR`
- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`
- 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
- 3D model files: `tps7a1115pdrvr-etched.step` / `tps7a1115pdrvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a1115pdrvr.step` / `tps7a1115pdrvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps7a11.pdf) (41 pp, sha256 `af774819c7eef8dd`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps7a1115pdrvr-datasheet.pdf)