# TPS7A0528PDBZR

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

TPS7A0528PDBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin. This pin must be connected to ground on the board. |
| 2 | OUT | power_out | Regulated output pin. A capacitor from OUT to ground is required for stability, with COUT of 0.47 µF minimum to 22 µF maximum per the Recommended Operating Conditions. |
| 3 | IN | power_in | Input supply pin, rated 1.4 V to 5.5 V per the Recommended Operating Conditions, with an input capacitor placed as close to the device as possible. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal accuracy |  | -1 |  | 1 | % | VOUT ≥ 1.0 V, TJ = 25°C | 7 |
| Accuracy over temperature |  | -2 |  | 2 | % | VOUT ≥ 1.0 V, TJ = -40°C to +85°C | 7 |
| Accuracy over temperature |  | -3 |  | 3 | % | VOUT ≥ 1.0 V | 7 |
| Load regulation (DBZ) | ΔVOUT(ΔIOUT) |  | 27 | 50 | mV | 100 μA ≤ IOUT ≤ 200 mA, VIN = VOUT(nom) + VDO(max) + 0.1 V, TJ = -40°C to +85°C, DBZ | 7 |
| Load regulation (DBZ) | ΔVOUT(ΔIOUT) |  |  | 62 | mV | 100 μA ≤ IOUT ≤ 200 mA, VIN = VOUT(nom) + VDO(max) + 0.1 V, DBZ | 7 |
| Line regulation | ΔVOUT(ΔVIN) |  | 5 | 16.5 | mV | VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V, TJ = -40°C to +85°C | 7 |
| Line regulation | ΔVOUT(ΔVIN) |  |  | 18 | mV | VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V | 7 |
| Ground current | IGND | 0.6 | 1 | 1.3 | µA | TJ = 25°C, IOUT = 1 µA | 7 |
| Ground current | IGND |  |  | 2 | µA | IOUT = 1 µA, TJ = -40°C to +85°C | 7 |
| Ground current | IGND |  |  | 3 | µA | IOUT = 1 µA | 7 |
| Shutdown current | ISHDN |  | 100 | 300 | nA | VEN = 0.4 V, 1.4 V ≤ VIN ≤ 5.5 V, TJ = 25°C | 7 |
| Output current limit | ICL | 210 | 450 | 700 | mA | VOUT = 90% × VOUT(nom), VIN = VOUT(nom) + VDO(max) + 0.5 V | 7 |
| Output current limit | ICL | 250 | 450 | 700 | mA | VOUT = 90% × VOUT(nom), VIN = VOUT(nom) + VDO(max) + 0.5 V, TJ = 0°C to +85°C | 7 |
| Short-circuit current limit | ISC |  | 65 | 150 | mA | VOUT = 0 V | 7 |
| Dropout voltage (DBZ) | VDO |  |  | 285 | mV | IOUT = 200 mA, TJ = -40°C to +85°C, DBZ Package, 2.5 V ≤ VOUT < 3.3 V | 8 |
| Dropout voltage (DBZ) | VDO |  |  | 318 | mV | IOUT = 200 mA, DBZ Package, 2.5 V ≤ VOUT < 3.3 V | 8 |
| UVLO threshold rising | VUVLO | 1.21 | 1.3 | 1.37 | V | VIN rising | 8 |
| UVLO threshold falling | VUVLO | 1.17 |  | 1.33 | V | VIN falling | 8 |
| UVLO hysteresis | VUVLO(HYST) |  | 40 |  | mV | VIN falling | 8 |
| EN pin logic high voltage | VEN(HI) | 0.9 |  |  | V |  | 8 |
| EN pin logic low voltage | VEN(LO) |  |  | 0.4 | V |  | 8 |
| EN pin current | IEN |  |  | 10 | nA | VEN = VIN = 5.5 V | 8 |
| Pulldown resistor (P version) | RPULLDOWN |  | 120 |  | Ω | VIN = 3.3 V, P version only | 8 |
| Thermal shutdown temperature | Tsd |  | 160 |  | °C | Shutdown, temperature increasing | 8 |
| Thermal shutdown reset temperature | Tsd |  | 140 |  | °C | Reset, temperature decreasing | 8 |
| Input supply voltage | VIN | 1.4 |  | 5.5 | V |  | 6 |
| Nominal output voltage range | VOUT | 0.8 |  | 3.3 | V |  | 6 |
| Output current | IOUT | 0 |  | 200 | mA |  | 6 |
| Input capacitor | CIN | 1 |  |  | µF |  | 6 |
| Output capacitor | COUT | 0.47 | 1 | 22 | µF |  | 6 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 6 |
| IN voltage | VIN | -0.3 |  | 6 | V | All voltages with respect to GND | 6 |
| EN voltage | VEN | -0.3 |  |  | V | Maximum is VIN + 0.3 V | 6 |
| OUT voltage | VOUT | -0.3 |  |  | V | Maximum is VIN + 0.3 V or 3.6 V (whichever is smaller) | 6 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 6 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 6 |
| Junction-to-ambient thermal resistance (DBZ) | RθJA |  | 267.3 |  | °C/W | DBZ (SOT-23), 3 pins | 6 |
| Junction-to-case (top) thermal resistance (DBZ) | RθJC(top) |  | 103.5 |  | °C/W | DBZ (SOT-23), 3 pins | 6 |
| Junction-to-board thermal resistance (DBZ) | RθJB |  | 98 |  | °C/W | DBZ (SOT-23), 3 pins | 6 |
| Junction-to-top characterization parameter (DBZ) | ΨJT |  | 9.2 |  | °C/W | DBZ (SOT-23), 3 pins | 6 |
| Junction-to-board characterization parameter (DBZ) | YJB |  | 97.4 |  | °C/W | DBZ (SOT-23), 3 pins | 6 |

## CAD (KiCad official)

- Symbol: `TPS7A0528PDBZR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `tps7a0528pdbzr-etched.step` / `tps7a0528pdbzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a0528pdbzr.step` / `tps7a0528pdbzr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps7a05.pdf) (56 pp, sha256 `4e552a784da45faa`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps7a0528pdbzr-datasheet.pdf)