component
TPS79933DRVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS79933DRVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
TPS79933DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Output of the regulator; a small ceramic capacitor with total typical capacitance of at least 2 μF is required from this pin to ground to assure stability. |
| 2 | NR | passive | Fixed voltage versions only; connecting an external capacitor to this noise reduction pin bypasses noise generated by the internal band gap and reduces output noise to very low levels. |
| 3 | GND | power_in | Ground; the exposed pad must be tied to GND. |
| 4 | EN | input | Driving this pin high turns on the regulator and driving it low puts the regulator into shutdown mode; EN can be connected to IN if not used. |
| 5 | N/C | unconnected | Not internally connected; this pin must either be left open or tied to GND. |
| 6 | IN | power_in | Input supply with an input voltage range of 2.7 V to 6.5 V, where minimum VIN is VOUT + VDO or 2.7 V, whichever is greater. |
| 7 | GND | power_in | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output accuracy, nominal | -1 | 1 | % | TJ = 25°C | 5 | ||
| Output accuracy over VIN, IOUT, temperature | -2 | 2 | % | VOUT + 0.3 V ≤ VIN ≤ 6.5 V, 500 μA ≤ IOUT ≤ 200 mA | 5 | ||
| Ground pin current | IGND | 40 | 60 | μA | 500 μA ≤ IOUT ≤ 200 mA | 5 | |
| Shutdown current (IGND) | ISHDN | 0.15 | 1 | μA | VEN ≤ 0.4 V, 2.7 V ≤ VIN ≤ 6.5 V | 5 | |
| Dropout voltage (VOUT(nom) ≥ 3.3 V) | VDO | 90 | 160 | mV | IOUT = 200 mA, VIN = VOUT(nom), 0.1 V | 5 | |
| Output current limit | ICL | 220 | 400 | 600 | mA | VOUT = 0.9 × VOUT(nom) | 5 |
| Undervoltage lockout | UVLO | 1.9 | 2.2 | 2.65 | V | VIN rising | 5 |
| Enable high (enabled) | VEN(HI) | 1.2 | V | Enable high (enabled); max printed as VIN | 5 | ||
| Enable low (shutdown) | VEN(LO) | 0 | 0.4 | V | Enable low (shutdown) | 5 | |
| Enable pin current, enabled | IEN(HI) | 0.03 | 1 | μA | VEN = VIN = 6.5 V | 5 | |
| Input voltage absolute maximum | IN | -0.3 | 7 | V | 4 | ||
| Enable voltage absolute maximum | EN | -0.3 | V | max VIN + 0.3 V | 4 | ||
| Output voltage absolute maximum | OUT | -0.3 | V | max VIN + 0.3 V | 4 | ||
| Operating virtual junction temperature | TJ | -55 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| Input voltage | VIN | 2.7 | 6.5 | V | Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater | 4 | |
| Output current | IOUT | 0.5 | 200 | mA | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance (DRV WSON) | RθJA | 74.2 | °C/W | DRV (WSON) 6-pin package | 4 | ||
| Junction-to-case (top) thermal resistance (DRV WSON) | RθJC(top) | 58.8 | °C/W | DRV (WSON) 6-pin package | 4 | ||
| Junction-to-board thermal resistance (DRV WSON) | RθJB | 145.9 | °C/W | DRV (WSON) 6-pin package | 4 | ||
| Junction-to-top characterization parameter (DRV WSON) | ψJT | 0.2 | °C/W | DRV (WSON) 6-pin package | 4 | ||
| Junction-to-board characterization parameter (DRV WSON) | ψJB | 54.4 | °C/W | DRV (WSON) 6-pin package | 4 | ||
| Junction-to-case (bottom) thermal resistance (DRV WSON) | RθJC(bot) | 7.2 | °C/W | DRV (WSON) 6-pin package | 4 |
CAD (KiCad official)
- Symbol:
TPS79933DRVR - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps79933drvr-etched.step/tps79933drvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79933drvr.step/tps79933drvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (49 pp, sha256
6f15dd5753263303, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).