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TPS79730MDCKREP
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tps79730mdckrep: specified limits as data (metadata.characteristics, 21 rows from the datasheet)
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TPS79730MDCKREP
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SC-70-5
TPS79730MDCKREP from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PG | output | PG is an open-drain active-high power-good output that goes high impedance when VO exceeds approximately 90% of the regulated voltage and low impedance when VO falls below approximately 90%, and it requires an external pullup resistor. |
| 2 | GND | power_in | GND is the ground terminal, and all voltage values are specified with respect to the network ground terminal. |
| 3 | NC | unconnected | NC is marked as no connection on the device. |
| 4 | IN | power_in | The IN terminal is the power supply input to the device, with an input voltage range of 1.8 V to 5.5 V for the stated output options (absolute maximum input voltage 0.3 to 6 V). |
| 5 | OUT | power_out | The OUT terminal provides the regulated output voltage of the device, with continuous output current of 0 to 10 mA, and requires an output capacitor of at least 0.47 µF between OUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (IO = 3 mA) | VI | 1.8 | 5.5 | V | IO = 3 mA | 4 | |
| Input voltage (IO = 10 mA) | VI | 2 | 5.5 | V | IO = 10 mA | 4 | |
| Continuous output current | IO | 0 | 10 | mA | 4 | ||
| Operating ambient temperature | TA | -55 | 125 | °C | 4 | ||
| Output voltage TPS79730 | VO | 2.88 | 3.12 | V | TJ = –55°C to 125°C, 4 V < VI < 5.5 V, 1 mA to 10 mA load | 4 | |
| Quiescent current (GND current) | IQ | 5 | µA | TJ = –55°C to 125°C, IO = 10 mA | 4 | ||
| Output current limit | ILIM | 190 | 300 | mA | VO = 0 V | 4 | |
| Dropout voltage TPS79730 | VDO | 400 | mV | IO = 10 mA, TA = –55°C to 125°C | 4 | ||
| PG output low voltage | VOL(PG) | 0.14 | 0.4 | V | VI = 1.4 V, I(PG) = 100 uA | 4 | |
| Input voltage range (absolute maximum) | 6 | V | Over operating free-air temperature range; all voltages with respect to network ground | 3 | |||
| Maximum dc output voltage | 4.9 | V | 3 | ||||
| ESD rating, HBM | 3 | kV | Human body model | 3 | |||
| ESD rating, CDM | 1 | kV | Charged device model | 3 | |||
| Operating junction temperature range | TJ | -55 | 145 | °C | 3 | ||
| Operating ambient temperature range (absolute maximum) | TA | -55 | 125 | °C | 3 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Junction-to-ambient thermal resistance, Low K board | RθJA | 396.24 | °C/W | DCK package, Low-K board | 3 | ||
| Junction-to-ambient thermal resistance, High K board | RθJA | 314.74 | °C/W | DCK package, High-K board | 3 | ||
| Junction-to-case thermal resistance | RθJC | 165.39 | °C/W | DCK package | 3 | ||
| Maximum junction temperature under normal operation | TJ | 125 | °C | Normal operating conditions | 8 | ||
| Minimum recommended output capacitance | CO | 0.47 | µF | Any capacitor; larger values acceptable | 8 |
CAD (KiCad official)
- Symbol:
TPS79730MDCKREP - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
tps79730mdckrep-etched.step/tps79730mdckrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79730mdckrep.step/tps79730mdckrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
bd0bdf9d2889c005, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS79730MDCKREP
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SC-70-5
TPS79730MDCKREP from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PG | output | PG is an open-drain active-high power-good output that goes high impedance when VO exceeds approximately 90% of the regulated voltage and low impedance when VO falls below approximately 90%, and it requires an external pullup resistor. |
| 2 | GND | power_in | GND is the ground terminal, and all voltage values are specified with respect to the network ground terminal. |
| 3 | NC | unconnected | NC is marked as no connection on the device. |
| 4 | IN | power_in | The IN terminal is the power supply input to the device, with an input voltage range of 1.8 V to 5.5 V for the stated output options (absolute maximum input voltage 0.3 to 6 V). |
| 5 | OUT | power_out | The OUT terminal provides the regulated output voltage of the device, with continuous output current of 0 to 10 mA, and requires an output capacitor of at least 0.47 µF between OUT and GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (IO = 3 mA) | VI | 1.8 | | 5.5 | V | IO = 3 mA | 4 |
| Input voltage (IO = 10 mA) | VI | 2 | | 5.5 | V | IO = 10 mA | 4 |
| Continuous output current | IO | 0 | | 10 | mA | | 4 |
| Operating ambient temperature | TA | -55 | | 125 | °C | | 4 |
| Output voltage TPS79730 | VO | 2.88 | | 3.12 | V | TJ = –55°C to 125°C, 4 V < VI < 5.5 V, 1 mA to 10 mA load | 4 |
| Quiescent current (GND current) | IQ | | | 5 | µA | TJ = –55°C to 125°C, IO = 10 mA | 4 |
| Output current limit | ILIM | | 190 | 300 | mA | VO = 0 V | 4 |
| Dropout voltage TPS79730 | VDO | | | 400 | mV | IO = 10 mA, TA = –55°C to 125°C | 4 |
| PG output low voltage | VOL(PG) | | 0.14 | 0.4 | V | VI = 1.4 V, I(PG) = 100 uA | 4 |
| Input voltage range (absolute maximum) | | | | 6 | V | Over operating free-air temperature range; all voltages with respect to network ground | 3 |
| Maximum dc output voltage | | | | 4.9 | V | | 3 |
| ESD rating, HBM | | | | 3 | kV | Human body model | 3 |
| ESD rating, CDM | | | | 1 | kV | Charged device model | 3 |
| Operating junction temperature range | TJ | -55 | | 145 | °C | | 3 |
| Operating ambient temperature range (absolute maximum) | TA | -55 | | 125 | °C | | 3 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 3 |
| Junction-to-ambient thermal resistance, Low K board | RθJA | | 396.24 | | °C/W | DCK package, Low-K board | 3 |
| Junction-to-ambient thermal resistance, High K board | RθJA | | 314.74 | | °C/W | DCK package, High-K board | 3 |
| Junction-to-case thermal resistance | RθJC | | 165.39 | | °C/W | DCK package | 3 |
| Maximum junction temperature under normal operation | TJ | | | 125 | °C | Normal operating conditions | 8 |
| Minimum recommended output capacitance | CO | 0.47 | | | µF | Any capacitor; larger values acceptable | 8 |
## CAD (KiCad official)
- Symbol: `TPS79730MDCKREP`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `tps79730mdckrep-etched.step` / `tps79730mdckrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79730mdckrep.step` / `tps79730mdckrep.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps79718-ep) (17 pp, sha256 `bd0bdf9d2889c005`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps79730mdckrep-datasheet.pdf)