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TPS79718QDCKRQ1

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Texas Instruments Linear Voltage Regulators (LDO), SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS79718QDCKRQ1

Texas Instruments · Linear Voltage Regulators (LDO) · SC-70-5

TPS79718QDCKRQ1 from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PG output Open-drain active-high power good output that goes high impedance when VO exceeds approximately 90% of the regulated voltage and low impedance when VO falls below it; requires a pullup resistor.
2 GND power_in Ground.
3 NC unconnected No connection.
4 IN power_in Power supply input to the device, with a 0.1-µF or larger bypass capacitor to GND recommended and an operating range of 1.8 V to 5.5 V.
5 OUT power_out Regulated output voltage (1.8 V for TPS79718), requiring an output capacitor of at least 0.47 µF to GND and supplying up to 10 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Power Supply Chip
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage TPS79718 (TJ range) VO 1.71 1.89 V TJ = −40°C to 125°C, 2.8 V < VI < 5.5 V 3
Output voltage TPS79718 (25°C) VO 1.8 V TA = 25°C, 2.8 V < VI < 5.5 V 3
Quiescent current (TJ range) IQ 5 µA TJ = −40°C to 125°C, IO = 10 mA 3
Quiescent current (25°C) IQ 1.2 µA TA = 25°C, 0 µA < IO < 10 mA 3
Output current limit 190 300 mA VO = 0 V 3
PG trip threshold voltage 82 90 96 %VO VO decreasing 3
PG output low voltage 0.14 0.4 V VI = 1.4 V, IO(PG) = 100 µA 3
Output voltage line regulation (TJ range) ΔVO/VO 0.8 %/V VO + 1 V < VI ≤ 5.5 V, TJ = −40°C to 125°C 3
Output voltage line regulation (25°C) ΔVO/VO 0.15 %/V VO + 1 V < VI ≤ 5.5 V, TA = 25°C 3
Load regulation 17 mV TA = 25°C, IO = 1 µA to 10 mA 3
Minimum input voltage for valid PG 1.2 V IO(PG) = 100µA, V(PG) ≥ 0.8 V 3
PG leakage current 0.1 nA V(PG) = 5 V 3
Output noise voltage 600 µVRMS BW = 200 Hz to 100 kHz, Co = 10 µF, IO = 10 mA, TA = 25°C 3
Power supply ripple rejection 50 dB f = 100 Hz, Co = 10 µF, IO = 10 mA, TA = 25°C 3
Input voltage VI 1.8 5.5 V IO = 3 mA 3
Input voltage VI 2 5.5 V IO = 10 mA 3
Continuous output current IO 0 10 mA 3
Operating junction temperature TJ -40 125 °C 3
Input voltage range VI -0.3 6 V 2
Maximum dc output voltage VO 4.9 V 2
ESD rating, HBM 3 kV 2
ESD rating, CDM 1 kV 2
Operating junction temperature range TJ -40 125 °C 2
Operating ambient temperature range TA -40 125 °C 2
Storage temperature range Tstg -65 150 °C 2
Thermal resistance junction-to-case RθJC 165.39 °C/W DCK package 2
Thermal resistance junction-to-ambient, Low K RθJA 396.24 °C/W Low K board, DCK 2
Thermal resistance junction-to-ambient, High K RθJA 314.74 °C/W High K board, DCK 2

CAD (KiCad official)

  • Symbol: TPS79718QDCKRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: tps79718qdckrq1-etched.step / tps79718qdckrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps79718qdckrq1.step / tps79718qdckrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 1c4871760dc44d55, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF