TPS79618DCQR

@@ -53,13 +53,13 @@         "number": "1",         "name": "EN",         "type": "input",-        "description": "Enable pin (active high). Drive EN above VEN(HI) to turn on the regulator; drive below VEN(LOW) to place the device in shutdown (ISHDN typically 0.07\u00b5A to 1\u00b5A max). If unused, connect EN to IN."+        "description": "Enable pin (active high). Drive EN above VEN(HI) to turn on the regulator; drive below VEN(LOW) to place the device in shutdown (ISHDN typically 0.07µA to 1µA max). If unused, connect EN to IN."       },       {         "number": "2",         "name": "IN",         "type": "power_in",-        "description": "Regulator input supply, 2.7V to 5.5V (old chip) or 2.7V to 6.0V (new chip); requires a 2.2\u00b5F or larger ceramic bypass capacitor to GND close to the device."+        "description": "Regulator input supply, 2.7V to 5.5V (old chip) or 2.7V to 6.0V (new chip); requires a 2.2µF or larger ceramic bypass capacitor to GND close to the device."       },       {         "number": "3",@@ -71,13 +71,13 @@         "number": "4",         "name": "OUT",         "type": "power_out",-        "description": "Regulated output of the LDO, rated for up to 1A continuous output current; requires a minimum 1\u00b5F ceramic output capacitor to GND for loop stability."+        "description": "Regulated output of the LDO, rated for up to 1A continuous output current; requires a minimum 1µF ceramic output capacitor to GND for loop stability."       },       {         "number": "5",         "name": "NR/NC",         "type": "passive",-        "description": "On the fixed-voltage 'old chip' die, this is the Noise-Reduction (NR) pin: an external capacitor (0.1\u00b5F or smaller, connected through an internal 250k\u03a9 resistor to the bandgap reference) can be added here to lower output noise and improve PSRR. On the fixed-voltage 'new chip' die, this position is No-Connect (N/C) and must be left open or tied to GND; the new-chip die has no NR function."+        "description": "On the fixed-voltage 'old chip' die, this is the Noise-Reduction (NR) pin: an external capacitor (0.1µF or smaller, connected through an internal 250kΩ resistor to the bandgap reference) can be added here to lower output noise and improve PSRR. On the fixed-voltage 'new chip' die, this position is No-Connect (N/C) and must be left open or tied to GND; the new-chip die has no NR function."       },       {         "number": "6",@@ -120,6 +120,46 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"-    }+    },+    "models_3d": [+      {+        "file": "tps79618dcqr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          8.475,+          6.7,+          1.6+        ],+        "zmin_mm": 0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "bf43e0f52215e5c8b069c660d1a580928edb1037d7f7155d98bb6d1df79e64ff",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps79618dcqr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          8.475,+          6.7,+          1.6+        ],+        "zmin_mm": 0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "571f9d8762e397e0eabb5fe359892299b47da23a85e05f1bfea342719d02acca",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]   }-}\ No newline at end of file+}