component
TPS79433DCQR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS79433DCQR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-6
TPS79433DCQR from Texas Instruments, in a SOT-223-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable input: a logic-high level enables the device and a logic-low level (at or below VEN(LOW) 0.7 V max for the old chip, 0.425 V max for the new chip) puts it in shutdown, with VEN rated 0 to 5.5 V in recommended operation. |
| 2 | IN | power_in | Unregulated input to the regulator, recommended VIN range 2.7 V to 5.5 V, with a ceramic input bypass capacitor of at least 1 µF connected between IN and GND close to the device. |
| 3 | GND | power_in | Regulator ground; pins 3 and 6 are both GND and the SOT-223 tab is electrically grounded, so it should be soldered to a large copper area for heat dissipation. |
| 4 | OUT | power_out | Regulated output of the device, rated for 0 to 250 mA continuous output current and requiring an output capacitor of at least 1.0 µF (2.2 µF typical) between OUT and GND for stability. |
| 5 | NR/NC | passive | On the old chip this is the noise-reduction (NR) pin, which connects to the internal 250 kΩ reference resistor and takes an external bypass capacitor of 0 to 100 nF (leakage must be minimal); on the new chip it is a no-connect that should be tied to GND or left floating. |
| 6 | GND | power_in | Regulator ground; second GND pin of the DCQ package, to be connected to the same ground plane as pin 3. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
TPS79433DCQR - Footprint:
Package_TO_SOT_SMD:SOT-223-6 - 3D model: SOT-223-6 (KiCad packages3D, STEP)
- 3D model files:
tps79433dcqr-etched.step/tps79433dcqr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79433dcqr.step/tps79433dcqr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
84291eb77a7c37c6, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS79433DCQR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-6
TPS79433DCQR from Texas Instruments, in a SOT-223-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable input: a logic-high level enables the device and a logic-low level (at or below VEN(LOW) 0.7 V max for the old chip, 0.425 V max for the new chip) puts it in shutdown, with VEN rated 0 to 5.5 V in recommended operation. |
| 2 | IN | power_in | Unregulated input to the regulator, recommended VIN range 2.7 V to 5.5 V, with a ceramic input bypass capacitor of at least 1 µF connected between IN and GND close to the device. |
| 3 | GND | power_in | Regulator ground; pins 3 and 6 are both GND and the SOT-223 tab is electrically grounded, so it should be soldered to a large copper area for heat dissipation. |
| 4 | OUT | power_out | Regulated output of the device, rated for 0 to 250 mA continuous output current and requiring an output capacitor of at least 1.0 µF (2.2 µF typical) between OUT and GND for stability. |
| 5 | NR/NC | passive | On the old chip this is the noise-reduction (NR) pin, which connects to the internal 250 kΩ reference resistor and takes an external bypass capacitor of 0 to 100 nF (leakage must be minimal); on the new chip it is a no-connect that should be tied to GND or left floating. |
| 6 | GND | power_in | Regulator ground; second GND pin of the DCQ package, to be connected to the same ground plane as pin 3. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `TPS79433DCQR`
- Footprint: `Package_TO_SOT_SMD:SOT-223-6`
- 3D model: SOT-223-6 (KiCad packages3D, STEP)
- 3D model files: `tps79433dcqr-etched.step` / `tps79433dcqr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79433dcqr.step` / `tps79433dcqr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps794) (51 pp, sha256 `84291eb77a7c37c6`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps79433dcqr-datasheet.pdf)