TPS79430DGNR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8

TPS79430DGNR from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT	power_out	Regulated LDO output rated for 0 to 250 mA, with the datasheet recommending a 2.2 µF COUT from OUT to GND (1.0 µF minimum).
2	NC	unconnected	Not internally connected; the datasheet says to tie it to GND for better thermal performance or leave it floating.
3	FB/NC	input	Feedback input for the adjustable version, which sets VOUT against the 1.225 V internal reference (VREF 1.201 V to 1.25 V).
4	NR/NC	input	On the old die this is the noise-reduction pin, tied to the internal reference through 250 kΩ, with CNR of 0 to 100 nF and not more than 0.1 µF; on the new die it is a no-connect that may be tied to GND or left floating.
5	GND	power_in	Regulator ground; the datasheet recommends connecting ground planes only at this GND pin and routing capacitor grounds directly to it.
6	EN	input	Active-high enable: the device is on above VEN(HI) (1.7 V min on the old die, 0.85×VIN min on the new die) and in shutdown below VEN(LOW) (0.7 V max old die, 0.425 V max new die), with VEN rated 0 to 5.5 V.
7	NC	unconnected	Not internally connected; the datasheet says to tie it to GND for better thermal performance or leave it floating.
8	IN	power_in	Unregulated input supply, recommended 2.7 V to 5.5 V, with a 1 µF or larger ceramic input capacitor to GND placed close to the device.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	MSOP-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: TPS79430DGNR
Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
3D model: MSOP-8 (KiCad packages3D, STEP)
3D model files: tps79430dgnr-etched.step / tps79430dgnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps79430dgnr.step / tps79430dgnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (51 pp, sha256 84291eb77a7c37c6, retrieved 2026-10-09, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPS79430DGNR

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8

TPS79430DGNR from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated LDO output rated for 0 to 250 mA, with the datasheet recommending a 2.2 µF COUT from OUT to GND (1.0 µF minimum). |
| 2 | NC | unconnected | Not internally connected; the datasheet says to tie it to GND for better thermal performance or leave it floating. |
| 3 | FB/NC | input | Feedback input for the adjustable version, which sets VOUT against the 1.225 V internal reference (VREF 1.201 V to 1.25 V). |
| 4 | NR/NC | input | On the old die this is the noise-reduction pin, tied to the internal reference through 250 kΩ, with CNR of 0 to 100 nF and not more than 0.1 µF; on the new die it is a no-connect that may be tied to GND or left floating. |
| 5 | GND | power_in | Regulator ground; the datasheet recommends connecting ground planes only at this GND pin and routing capacitor grounds directly to it. |
| 6 | EN | input | Active-high enable: the device is on above VEN(HI) (1.7 V min on the old die, 0.85×VIN min on the new die) and in shutdown below VEN(LOW) (0.7 V max old die, 0.425 V max new die), with VEN rated 0 to 5.5 V. |
| 7 | NC | unconnected | Not internally connected; the datasheet says to tie it to GND for better thermal performance or leave it floating. |
| 8 | IN | power_in | Unregulated input supply, recommended 2.7 V to 5.5 V, with a 1 µF or larger ceramic input capacitor to GND placed close to the device. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `TPS79430DGNR`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `tps79430dgnr-etched.step` / `tps79430dgnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79430dgnr.step` / `tps79430dgnr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps794) (51 pp, sha256 `84291eb77a7c37c6`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps79430dgnr-datasheet.pdf)