component
TPS79401DGNR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 22h ago |
| viewers | 22h ago |
| package.json | 22h ago |
| page.json | 22h ago |
| README.md | 22h ago |
| tps79401dgnr-etched.glb | 22h ago |
| tps79401dgnr-etched.step | 22h ago |
| tps79401dgnr-hero.glb | 1h ago |
| tps79401dgnr-hero.overlay.json | 22h ago |
| tps79401dgnr.glb | 22h ago |
| tps79401dgnr.kicad_mod | 22h ago |
| tps79401dgnr.kicad_sym | 22h ago |
| tps79401dgnr.lbr | 22h ago |
| tps79401dgnr.step | 22h ago |
TPS79401DGNR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS79401DGNR from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulator output; the device delivers up to 250 mA (IOUT 0 to 250 mA recommended) and requires a COUT of at least 1.0 µF (2.2 µF typical) to OUT-GND. |
| 2 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |
| 3 | FB | input | Feedback input for the adjustable device, which sets VOUT through the external R1/R2 divider referenced to the 1.225 V internal reference (VREF 1.201 V to 1.25 V). |
| 4 | NR/NC | input | On the older chip this is the noise-reduction pin, where an external capacitor CNR of 0 to 100 nF (10 nF nominal) filters bandgap noise; on the newer chip it is not connected and may be tied to GND or left floating. |
| 5 | GND | power_in | Regulator ground. |
| 6 | EN | input | Enable input, active high: the device is on when EN is above VEN(HI) (1.7 V minimum on the older chip, 0.85 × VIN on the newer chip) and off when EN is below VEN(LOW); VEN range is 0 to 5.5 V. |
| 7 | NC | unconnected | Not internally connected; connect to GND for better thermal performance or leave floating. |
| 8 | IN | power_in | Unregulated input supply; VIN must be between 2.7 V and 5.5 V, and a 1 µF or larger ceramic capacitor should be placed close to the pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS79401DGNR - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
tps79401dgnr-etched.step/tps79401dgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79401dgnr.step/tps79401dgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
84291eb77a7c37c6, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).