← Commit history

Initial commit: component/tps79328qdbvrq1

Ray ·8268b2da88 ·1d ago
2 files changed +224
README.mdadded+42
@@ -0,0 +1,42 @@+# TPS79328QDBVRQ1++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5++TPS79328QDBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | input | Regulator input; recommended supply range is 2.7 V to 5.5 V, and a 0.1 µF or larger ceramic input capacitor is needed between IN and GND for stability. |+| 2 | GND | power_in | Regulator ground; the datasheet asks that the ground planes for VIN and VOUT be joined only at this pin to help AC performance. |+| 3 | EN | input | Active-high enable; the device turns on when EN is above VEN(HI) (0.85 × VIN on the new chip, 1.7 V on the old chip) and turns off below VEN(LOW) (0.425 V new chip, 0.7 V old chip), and EN should be tied to IN if shutdown is not needed. |+| 4 | BYPASS | passive | On the old chip this pin is BYPASS, connected through an internal 250 kΩ resistor to the voltage reference, where an external capacitor (0.01 µF typical in the test conditions) filters reference noise and must have minimal leakage; on the new chip this pin is NC, not internally connected, and may be tied to GND for thermal performance or left floating. |+| 5 | OUT | power_out | Regulated output at 2.8 V nominal (2.744 V to 2.856 V over 0 to 200 mA), requiring at least 2.2 µF of output capacitance on the old chip or at least 0.47 µF effective on the new chip. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOT-23-5 |+| Category | Power Management (PMIC) |+| Pins | 5 |++## CAD (KiCad official)++- Symbol: `TPS79328QDBVRQ1`+- Footprint: `Package_TO_SOT_SMD:SOT-23-5`+- 3D model: SOT-23-5 (KiCad packages3D, STEP)+- 3D model files: `tps79328qdbvrq1-etched.step` / `tps79328qdbvrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps79328qdbvrq1.step` / `tps79328qdbvrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps793-q1) (40 pp, sha256 `7ea2cf405d5dd786`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps79328qdbvrq1-datasheet.pdf)
page.jsonadded+182
@@ -0,0 +1,182 @@+{+  "slug": "tps79328qdbvrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps79328qdbvrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps79328qdbvrq1.kicad_sym",+    "tps79328qdbvrq1.kicad_mod",+    "tps79328qdbvrq1.glb",+    "tps79328qdbvrq1.step",+    "tps79328qdbvrq1.lbr",+    "docs/hero.png",+    "docs/tps79328qdbvrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps79328qdbvrq1-hero.glb",+    "tps79328qdbvrq1-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS79328QDBVRQ1",+    "manufacturer": "Texas Instruments",+    "package": "SOT-23-5",+    "pin_count": 5,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps793-q1",+    "parts": {+      "symbol": "tps79328qdbvrq1.kicad_sym",+      "footprint": "tps79328qdbvrq1.kicad_mod",+      "model_3d": "tps79328qdbvrq1-hero.glb",+      "model_3d_plain": "tps79328qdbvrq1.glb",+      "model_3d_step": "tps79328qdbvrq1-etched.step",+      "model_3d_step_plain": "tps79328qdbvrq1.step",+      "lbr": "tps79328qdbvrq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C2862346",+      "digikey": "296-36849-2-ND",+      "mouser": "595-TPS79328QDBVRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T22:39:06Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-36849-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS79328QDBVRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "IN",+        "type": "input",+        "description": "Regulator input; recommended supply range is 2.7 V to 5.5 V, and a 0.1 µF or larger ceramic input capacitor is needed between IN and GND for stability."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Regulator ground; the datasheet asks that the ground planes for VIN and VOUT be joined only at this pin to help AC performance."+      },+      {+        "number": "3",+        "name": "EN",+        "type": "input",+        "description": "Active-high enable; the device turns on when EN is above VEN(HI) (0.85 × VIN on the new chip, 1.7 V on the old chip) and turns off below VEN(LOW) (0.425 V new chip, 0.7 V old chip), and EN should be tied to IN if shutdown is not needed."+      },+      {+        "number": "4",+        "name": "BYPASS",+        "type": "passive",+        "description": "On the old chip this pin is BYPASS, connected through an internal 250 kΩ resistor to the voltage reference, where an external capacitor (0.01 µF typical in the test conditions) filters reference noise and must have minimal leakage; on the new chip this pin is NC, not internally connected, and may be tied to GND for thermal performance or left floating."+      },+      {+        "number": "5",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulated output at 2.8 V nominal (2.744 V to 2.856 V over 0 to 200 mA), requiring at least 2.2 µF of output capacitance on the old chip or at least 0.47 µF effective on the new chip."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Pin 4 differs between chip revisions: BYPASS on the old chip (figure 4-1) and NC on the new chip (fi; Pin 4 type is marked as passive for the BYPASS function. The datasheet gives no electrical type for ; The datasheet text is a Chinese translation of the English document SGLS162. Pin functions were take"+        ],+        "pages_sent": 22,+        "cost_usd": 0.1098,+        "at": "2026-10-07T22:38:50"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps793-q1",+        "pages": 40,+        "sha256": "7ea2cf405d5dd786",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 5,+        "described": 5,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps79328qdbvrq1.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          2.8,+          2.9,+          1.55+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "720a6eab0024069bbee68e7cb4c3ff1149468a34611225cdc852662c5d0ec2b7",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps79328qdbvrq1-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          2.8,+          2.9,+          1.55+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "a24362c688bdda2b3c90d84faa357f24c96363fdbfffc4c816dfefeadf06f272",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file