TPS79318DBVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
TPS79318DBVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS79318DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply to the regulator. Recommended input voltage range 2.7 V to 5.5 V; absolute maximum 6 V. Bypass with a 0.1-µF to 1-µF ceramic capacitor to GND. |
| 2 | GND | power_in | Regulator ground reference. All voltages are measured with respect to this pin. |
| 3 | EN | input | Enable pin. Driving EN high (up to VIN) turns on the regulator; driving it low puts the regulator into shutdown mode. Tie to IN if unused. Absolute maximum -0.3 V to 6 V. |
| 4 | NR | passive | Noise Reduction pin. Connect an external capacitor (up to 10 nF) from this pin to GND to filter noise generated by the internal bandgap reference, improving PSRR and reducing output noise. |
| 5 | OUT | power_out | Regulated output pin. Fixed 1.8-V output at up to 200 mA (TPS79318). Requires a 2.2-µF (minimum) ceramic output capacitor to GND for stability; 10 µF recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
TPS79318DBVRTPS79318DBVRDBVTTPS79318DBVRYZQRTPS79318DBVRYZQT
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (TPS79318, 1.8 V fixed) | VOUT | 1.764 | 1.8 | 1.836 | V | 0 µA < IOUT < 200 mA, 2.8 V < VIN < 5.5 V | 6 |
| Input voltage range | VIN | 2.7 | 5.5 | V | 6 | ||
| Continuous output current | IOUT | 0 | 200 | mA | 6 | ||
| Output current limit | ICL | 285 | 600 | mA | VOUT = 0 V | 6 | |
| Ground pin current | IGND | 170 | 220 | µA | 0 µA < IOUT < 200 mA | 6 | |
| Shutdown current | ISHUTDOWN | 0.07 | 1 | µA | VEN = 0 V, 2.7 V < VIN < 5.5 V | 6 | |
| Line regulation | ΔVOUT(ΔVIN) | 0.05 | 0.12 | %/V | VOUT + 1 V < VIN ≤ 5.5 V | 6 | |
| Load regulation | ΔVOUT(ΔIOUT) | 5 | mV | 0 µA < IOUT < 200 mA, TJ = 25°C | 6 | ||
| High-level enable input voltage | VEN(high) | 1.7 | V | 2.7 V < VIN < 5.5 V | 6 | ||
| Low-level enable input voltage | VEN(low) | 0 | 0.7 | V | 2.7 V < VIN < 5.5 V | 6 | |
| EN pin current | IEN | -1 | 1 | µA | VEN = 0 V | 6 | |
| UVLO threshold, VCC rising | 2.25 | 2.65 | V | 6 | |||
| UVLO hysteresis | 100 | mV | 6 | ||||
| Input supply voltage range (recommended) | VIN | 2.7 | 5.5 | V | 4 | ||
| Enable supply voltage range (recommended) | VEN | 0 | V | 4 | |||
| Output current (recommended) | IOUT | 0 | 200 | mA | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Input capacitor | CIN | 0.1 | 1 | µF | 4 | ||
| Output capacitor | COUT | 2.2 | 10 | µF | 4 | ||
| Noise reduction capacitor | CNR | 0 | 10 | nF | 4 | ||
| Input voltage | VIN | -0.3 | 6 | V | All voltages with respect to GND | 4 | |
| Enable voltage | VEN | -0.3 | 6 | V | All voltages with respect to GND | 4 | |
| Output voltage | VOUT | -0.3 | 6 | V | All voltages with respect to GND | 4 | |
| Junction temperature, DBV package | TJ | -40 | 150 | °C | DBV package | 4 | |
| Storage temperature | Tstg | -65 | 150 | °C | 4 |
CAD (KiCad official)
- Symbol:
TPS79318DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps79318dbvr-etched.step/tps79318dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps79318dbvr.step/tps79318dbvr.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tps79318dbvr.step |
85 KB | You want the bare part, or you mark your own boards. |
tps79318dbvr-etched.step |
2.3 MB | You want the part with TPS79318DBVR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 566 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
49694a90e8294ec9, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).