main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 23h ago
viewers tps79301mdbvrep: viewers · Ray 23h ago
package.json Publish 0.1.0 · Ray 23h ago
page.json Set visibility: public · Ray 23h ago
README.md Initial commit: component/tps79301mdbvrep · Ray 23h ago
tps79301mdbvrep-etched.glb tps79301mdbvrep: factory component page (tier=lcsc) · Ray 23h ago
tps79301mdbvrep-etched.step tps79301mdbvrep: factory component page (tier=lcsc) · Ray 23h ago
tps79301mdbvrep-hero.glb tps79301mdbvrep: hero GLB from the etched model (keeps the MPN mark) · Ray 17h ago
tps79301mdbvrep-hero.overlay.json Publish 0.1.0 · Ray 23h ago
tps79301mdbvrep.glb Publish 0.1.0 · Ray 23h ago
tps79301mdbvrep.kicad_mod Publish 0.1.0 · Ray 23h ago
tps79301mdbvrep.kicad_sym Publish 0.1.0 · Ray 23h ago
tps79301mdbvrep.lbr Publish 0.1.0 · Ray 23h ago
tps79301mdbvrep.step Publish 0.1.0 · Ray 23h ago

TPS79301MDBVREP

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-6

TPS79301MDBVREP from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input to the device; the datasheet gives an absolute maximum input range of -0.3 V to 6 V and an operating range of 2.7 V to 5.5 V (or VO(typ) + 1 V, whichever is greater).
2 GND power_in Regulator ground; the input and output bypass capacitor grounds should connect directly to this pin.
3 EN input Enable input: a logic high (at least 2 V) enables the device and a logic low (at most 0.7 V) puts it in shutdown, with input current limited to ±1 µA.
4 BYPASS passive Connects to the internal 250 kΩ reference resistor so an external bypass capacitor forms a low-pass filter for reference noise, and the bypass capacitor must have minimal leakage current.
5 FB input Feedback input for the adjustable device, where the internal reference is 1.2246 V typical and the FB input current is limited to 1 µA at FB = 1.8 V.
6 OUT power_out Regulated output of the device, which requires a minimum 2.2 µF ceramic output capacitor from OUT to GND for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: TPS79301MDBVREP
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tps79301mdbvrep-etched.step / tps79301mdbvrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps79301mdbvrep.step / tps79301mdbvrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 914771336553ee4e, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF