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TPS78930DBVR
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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tps78930dbvr: specified limits as data (metadata.characteristics, 13 rows from the datasheet)
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TPS78930DBVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS78930DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | The IN terminal is the input to the device, with a recommended input voltage of 2.7 V to 10 V and an absolute maximum input voltage range of -0.3 V to 13.5 V. |
| 2 | GND | power_in | Regulator ground pin, which is the return for the input and output and is referenced by all voltage ratings in the datasheet. |
| 3 | EN | input | Active-low enable: a voltage of 1.7 V or greater disables the regulator and reduces supply current to 1 µA, while a voltage below 0.9 V enables it, with absolute limits of -0.3 V to VI. |
| 4 | BYPASS | passive | The external bypass capacitor connects to an internal 150 kΩ resistor to form a low-pass filter that reduces reference noise, and a larger bypass capacitance slows output start-up because of the RC time constant. |
| 5 | OUT | power_out | The OUT terminal is the regulated output, rated for 0 mA to 100 mA continuous output current with a voltage on OUT absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage, TJ = -40°C to 125°C, 4.0 V < VI < 10 V (TPS78930) | VO | 2.91 | 3.09 | V | TJ = -40°C to 125°C, 4.0 V < VI < 10 V | 4 | |
| Input current (EN) | -1 | 0 | 1 | µA | EN = 0 V | 5 | |
| Input voltage, VI | VI | 2.7 | 10 | V | see Note 2 | 4 | |
| Continuous output current, IO | IO | 0 | 100 | mA | see Note 3 | 4 | |
| Operating junction temperature, TJ | TJ | -40 | 125 | °C | see Note 3 | 4 | |
| Input voltage range | VI | -0.3 | 13.5 | V | 3 | ||
| Voltage range at EN | -0.3 | V | 3 | ||||
| Voltage on OUT | 7 | V | 3 | ||||
| Operating virtual junction temperature range, TJ | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature range, Tstg | Tstg | -65 | 150 | °C | 3 | ||
| Junction-to-ambient thermal resistance, DBV, low K board | RθJA | 259 | °C/W | JEDEC Low K (1s) board | 3 | ||
| Junction-to-ambient thermal resistance, DBV, high K board | RθJA | 180 | °C/W | JEDEC High K (2s2p) board | 3 | ||
| Junction-to-case thermal resistance, DBV | RθJC | 65.8 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
TPS78930DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps78930dbvr-etched.step/tps78930dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps78930dbvr.step/tps78930dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
f216afa23ba1c3fd, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS78930DBVR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS78930DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | The IN terminal is the input to the device, with a recommended input voltage of 2.7 V to 10 V and an absolute maximum input voltage range of -0.3 V to 13.5 V. |
| 2 | GND | power_in | Regulator ground pin, which is the return for the input and output and is referenced by all voltage ratings in the datasheet. |
| 3 | EN | input | Active-low enable: a voltage of 1.7 V or greater disables the regulator and reduces supply current to 1 µA, while a voltage below 0.9 V enables it, with absolute limits of -0.3 V to VI. |
| 4 | BYPASS | passive | The external bypass capacitor connects to an internal 150 kΩ resistor to form a low-pass filter that reduces reference noise, and a larger bypass capacitance slows output start-up because of the RC time constant. |
| 5 | OUT | power_out | The OUT terminal is the regulated output, rated for 0 mA to 100 mA continuous output current with a voltage on OUT absolute maximum of 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage, TJ = -40°C to 125°C, 4.0 V < VI < 10 V (TPS78930) | VO | 2.91 | | 3.09 | V | TJ = -40°C to 125°C, 4.0 V < VI < 10 V | 4 |
| Input current (EN) | | -1 | 0 | 1 | µA | EN = 0 V | 5 |
| Input voltage, VI | VI | 2.7 | | 10 | V | see Note 2 | 4 |
| Continuous output current, IO | IO | 0 | | 100 | mA | see Note 3 | 4 |
| Operating junction temperature, TJ | TJ | -40 | | 125 | °C | see Note 3 | 4 |
| Input voltage range | VI | -0.3 | | 13.5 | V | | 3 |
| Voltage range at EN | | -0.3 | | | V | | 3 |
| Voltage on OUT | | | | 7 | V | | 3 |
| Operating virtual junction temperature range, TJ | TJ | -40 | | 150 | °C | | 3 |
| Storage temperature range, Tstg | Tstg | -65 | | 150 | °C | | 3 |
| Junction-to-ambient thermal resistance, DBV, low K board | RθJA | | 259 | | °C/W | JEDEC Low K (1s) board | 3 |
| Junction-to-ambient thermal resistance, DBV, high K board | RθJA | | 180 | | °C/W | JEDEC High K (2s2p) board | 3 |
| Junction-to-case thermal resistance, DBV | RθJC | | 65.8 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `TPS78930DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps78930dbvr-etched.step` / `tps78930dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps78930dbvr.step` / `tps78930dbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps789) (20 pp, sha256 `f216afa23ba1c3fd`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps78930dbvr-datasheet.pdf)