component
TPS78401DBVR
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
| docs | 5h ago |
| viewers | 5h ago |
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| README.md | 5h ago |
| tps78401dbvr-etched.glb | 5h ago |
| tps78401dbvr-etched.step | 5h ago |
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| tps78401dbvr-hero.overlay.json | 5h ago |
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| tps78401dbvr.step | 5h ago |
TPS78401DBVR
Texas Instruments · Pre-ordered Chips · SOT-23-5
TPS78401DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply pin (1.65 V to 6.0 V operating range); use the recommended value or larger ceramic capacitor from IN to ground, placed as close to the device as possible. |
| 2 | GND | power_in | Ground pin that must be connected to ground on the board. |
| 3 | EN | input | Enable pin: logic high enables the device and logic low disables it; do not float this pin, and connect EN to IN if not used. |
| 4 | FB | input | Feedback input to the control-loop error amplifier, used with external resistors to set the output voltage (1.2 V to 5.5 V adjustable range); do not float this pin. |
| 5 | OUT | power_out | Regulated output pin requiring 0.47 µF or greater effective capacitance to ground for stability, with a 1-µF or larger ceramic capacitor recommended for best transient response, placed close to the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Interface ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 1.65 | 6 | V | 5 | ||
| Output voltage | VOUT | 1.2 | 5.5 | V | 5 | ||
| Input capacitor | CIN | 1 | µF | 5 | |||
| Output capacitor | COUT | 1 | 200 | µF | minimum effective capacitance is 0.47 µF | 5 | |
| Output current | IOUT | 0 | 300 | mA | 5 | ||
| Output capacitor ESR | COUT,ESR | 0.001 | 1 | Ω | 5 | ||
| Enable voltage | VEN | 0 | 6 | V | 5 | ||
| Enable toggle frequency | FEN | 10 | kHz | 5 | |||
| Junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Supply voltage | VIN | -0.3 | 6.5 | V | 4 | ||
| Enable voltage | VEN | -0.3 | 6.5 | V | 4 | ||
| Output voltage | VOUT | -0.3 | 6.5 | V | VIN + 0.3 V or 6.5 V, whichever is smaller | 4 | |
| Feedback voltage | VFB | -0.3 | 2 | V | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | HBM, all pins | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | CDM, all pins | 4 | |
| Output accuracy | VOUT | -0.5 | 0.5 | % | 1 mA ≤ IOUT ≤ 300 mA, VOUT(NOM) + 0.5 V ≤ VIN ≤ 6.0 V, TJ = 25°C | 6 | |
| Output accuracy | VOUT | -0.75 | 0.75 | % | 1 mA ≤ IOUT ≤ 300 mA, VOUT(NOM) + 0.5 V ≤ VIN ≤ 6.0 V, -40°C ≤ TJ ≤ 85°C | 6 | |
| Output accuracy | VOUT | -1 | 1 | % | 1 mA ≤ IOUT ≤ 300 mA, VOUT(NOM) + 0.5 V ≤ VIN ≤ 6.0 V, 85°C ≤ TJ ≤ 150°C | 6 | |
| Load regulation | -5 | 5 | mV | 0.1 mA ≤ IOUT ≤ 300 mA, TJ = 25°C | 6 | ||
| Load regulation | -5 | 10 | mV | 0.1 mA ≤ IOUT ≤ 300 mA, -40°C ≤ TJ ≤ 150°C | 6 | ||
| Ground current | IGND | 15 | 25 | 30 | µA | TJ = 25°C, IOUT = 0 mA | 6 |
| Ground current | IGND | 35 | µA | IOUT = 0 mA | 6 | ||
| Shutdown current | ISHDN | 0.15 | 1 | µA | VEN ≤ 0.3 V, 1.65 V ≤ VIN ≤ 6.0 V, TJ = 25°C | 6 | |
| Shutdown current | ISHDN | 1 | µA | VEN ≤ 0.3 V, 1.65 V ≤ VIN ≤ 6.0 V, -40°C ≤ TJ ≤ 85°C | 6 | ||
| Shutdown current | ISHDN | 3 | µA | VEN ≤ 0.3 V, 1.65 V ≤ VIN ≤ 6.0 V, -40°C ≤ TJ ≤ 150°C | 6 | ||
| Feedback voltage | VFB | 1.182 | 1.2 | 1.218 | V | 6 | |
| Feedback pin current | IFB | -0.1 | 0.01 | 0.05 | µA | 6 | |
| Output current limit | ICL | 320 | 460 | mA | VIN = VOUT(NOM) + 1 V, VOUT = 0.9 x VOUT(NOM) | 6 | |
| Short-circuit current limit | ISC | 175 | mA | VOUT = 0 V | 6 | ||
| Dropout voltage | VDO | 300 | mV | IOUT = 300 mA, VOUT = 0.95 x VOUT(NOM), 1.2 V ≤ VOUT < 1.5 V | 6 | ||
| Dropout voltage | VDO | 175 | mV | IOUT = 300 mA, VOUT = 0.95 x VOUT(NOM), 1.5 V ≤ VOUT < 1.8 V | 6 | ||
| Dropout voltage | VDO | 140 | mV | IOUT = 300 mA, VOUT = 0.95 x VOUT(NOM), 1.8 V ≤ VOUT < 2.5 V | 6 | ||
| Dropout voltage | VDO | 115 | mV | IOUT = 300 mA, VOUT = 0.95 x VOUT(NOM), 2.5 V ≤ VOUT ≤ 5.0 V | 6 | ||
| Undervoltage lockout rising | VUVLO,rising | 1.32 | 1.42 | 1.6 | V | VIN rising | 6 |
| Undervoltage lockout falling | VUVLO,falling | 1.17 | 1.29 | 1.42 | V | VIN falling | 6 |
| Startup time | tSTR | 500 | 780 | µs | From EN low-to-high transition to VOUT = VOUT(NOM) x 95% | 6 | |
| EN pin high voltage (enabled) | VEN(HI) | 0.85 | V | 6 | |||
| EN pin low voltage (enabled) | VEN(LO) | 0.425 | V | 6 | |||
| Line regulation | 0.3 | mV | VOUT(NOM) + 0.5 V ≤ VIN ≤ 6.0 V | 6 | |||
| UVLO hysteresis | VUVLO,HYST | 130 | mV | VIN hysteresis | 6 | ||
| Enable pin current | IEN | 10 | nA | VIN = VEN = 6.0 V | 6 | ||
| Pulldown resistance | RPULLDOWN | 100 | Ω | VIN = 3.3 V | 6 | ||
| PSRR | PSRR | 52 | dB | VOUT = 3.3 V, IOUT = 300 mA, VIN = VOUT(NOM) + 1 V, f = 1 kHz | 6 | ||
| Output noise voltage | Vn | 30 | µVRMS | BW = 10 Hz to 100 kHz, VOUT = 1.2 V | 6 | ||
| Thermal shutdown temperature | TSD(shutdown) | 170 | °C | Shutdown, temperature increasing | 7 | ||
| Thermal shutdown reset temperature | TSD(reset) | 160 | °C | Reset, temperature decreasing | 7 | ||
| Junction-to-ambient thermal resistance | RθJA | 170.8 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 93.1 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 10.2 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 17.5 | °C/W | DBV (SOT-23), 5 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 40 | °C/W | DBV (SOT-23), 5 pins | 5 |
CAD (KiCad official)
- Symbol:
TPS78401DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps78401dbvr-etched.step/tps78401dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps78401dbvr.step/tps78401dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
1256cad447f081c0, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).