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Contents

README

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TPS78225DRVT

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)

TPS78225DRVT from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage pin; a small 1-µF ceramic capacitor is needed from this pin to ground to assure stability.
2 NC unconnected No internal connection.
3 GND power_in Ground pin; tie all ground pins to ground for proper operation.
4 EN input Enable pin; drive above 1.2 V to turn on the regulator and below 0.4 V to put it into shutdown, reducing operating current to 18 nA typical.
5 GND power_in Ground pin; tie all ground pins to ground for proper operation.
6 IN power_in Input pin; for stable operation place a 0.1-µF capacitor from this pin to ground (typical input capacitor 1.0 µF), with input and output capacitor grounds tied to the IC ground with no significant impedance between them; input voltage range is 2.2 V to 5.5 V.
7 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6-EP(2x2)
Category Power Management (PMIC)
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage -0.3 6 V 4
Voltage Enable -0.3 V 4
Output voltage range -0.3 V 4
Operating junction temperature TJ -40 160 °C 4
Storage temperature Tstg -55 150 °C 4
Input voltage VIN 2.2 5.5 V 4
Output voltage VOUT 1.8 4.2 V 4
Enable voltage VEN 0 V 4
Output current IOUT 0 150 mA 4
Junction temperature TJ -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 65.9 °C/W DRV package, 6 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 87.3 °C/W DRV package, 6 pins 4
Junction-to-board thermal resistance RθJB 35.4 °C/W DRV package, 6 pins 4
Junction-to-top characterization parameter ψJT 1.7 °C/W DRV package, 6 pins 4
Junction-to-board characterization parameter ψJB 35.8 °C/W DRV package, 6 pins 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 6.1 °C/W DRV package, 6 pins 4
Input voltage range VIN 2.2 5.5 V 5
DC output accuracy VOUT -2 2 % Nominal TJ = 25°C 5
DC output accuracy VOUT -3 3 % Over VIN, IOUT, temperature; VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V, 0 mA ≤ IOUT ≤ 150 mA 5
Line regulation ΔVOUT(ΔVIN) -1 1 % VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 5 mA 5
Load regulation ΔVOUT(ΔIOUT) -2 2 % 0 mA ≤ IOUT ≤ 150 mA 5
Output current limit ILIM 150 230 400 mA VOUT = 0.90 × VOUT(nom) 5
Ground pin current IGND 0.42 1.3 μA IOUT = 0 mA 5
Ground pin current IGND 8 μA IOUT = 150 mA 5
Shutdown current (IGND) ISHDN 18 130 nA VEN ≤ 0.4 V, 2.2 V ≤ VIN < 5.5 V, TJ = –40°C to 100°C 5
Operating junction temperature TJ -40 125 °C 5

CAD (KiCad official)

  • Symbol: TPS78225DRVT
  • Footprint: Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm
  • 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: tps78225drvt-etched.step / tps78225drvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps78225drvt.step / tps78225drvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 6d5284ff468719a7, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF