component
TPS77418DGK
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TPS77418DGK
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VSSOP-8-0.65mm
TPS77418DGK from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB/SENSE | input | For the fixed-output TPS77418 this SENSE pin must be connected to the regulator output as short as possible, and RC filtering between SENSE and VOUT is not recommended because it may cause the regulator to oscillate. |
| 2 | PG | output | Open-drain, active-high power-good output that goes high-impedance when VOUT reaches 82% of its regulated voltage and low-impedance when VOUT falls below 82%, and it requires an external pullup resistor. |
| 3 | EN | input | Enable input where a logic low enables the regulator and a logic high puts the device into shutdown mode, reducing quiescent current to less than 1 µA at TJ = 25°C. |
| 4 | GND | power_in | Regulator ground (signal ground) that serves as the return for the output capacitor connection between OUT and GND. |
| 5 | IN | power_in | Input voltage pin for the LDO; the PMOS pass device has a built-in back diode that conducts reverse current from OUT to IN when the input drops below the output, and this current is not internally limited. |
| 6 | IN | power_in | Second input voltage pin, internally tied in parallel with pin 5 for the LDO input; the datasheet gives no separate limit for this pin. |
| 7 | OUT | power_out | Regulated output voltage pin that requires an output capacitor to GND of at least 1 µF with ESR within the stated region of stability, or at least 10 µF with low ESR, to keep the control loop stable. |
| 8 | OUT | power_out | Second regulated output pin, internally tied in parallel with pin 7, that shares the same output capacitor requirement of at least 1 µF (with qualifying ESR) or at least 10 µF with low ESR. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8-0.65mm |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS77418DGK - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
- 3D model files:
tps77418dgk-etched.step/tps77418dgk-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps77418dgk.step/tps77418dgk.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
ea56bf7919f0accf, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).