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TPS76925DBVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs tps76925dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tps76925dbvr: viewers · Ray 9d ago
package.json Publish 0.1.0 · Ray 9d ago
page.json Set visibility: public · Ray 9d ago
README.md Initial commit: component/tps76925dbvr · Ray 9d ago
tps76925dbvr-etched.fit.json tps76925dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps76925dbvr-etched.glb tps76925dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps76925dbvr-etched.step tps76925dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps76925dbvr.glb Publish 0.1.0 · Ray 9d ago
tps76925dbvr.kicad_mod Publish 0.1.0 · Ray 9d ago
tps76925dbvr.kicad_sym Publish 0.1.0 · Ray 9d ago
tps76925dbvr.lbr Publish 0.1.0 · Ray 9d ago
tps76925dbvr.step Publish 0.1.0 · Ray 9d ago

TPS76925DBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS76925DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage pin, accepts 2.7V to 10V (old chip), place 1µF input capacitor as close as possible to IN and GND pins.
2 GND power_in Ground return pin for input and output circuits.
3 EN input Enable input pin, low-level active, enables output when voltage is below 0.9V and disables when voltage is above 1.7V (old chip).
4 FB/NC unconnected No connect pin for fixed voltage version; do not leave floating (old chip specification).
5 OUT power_out Regulated output voltage pin providing 2.5V, place 4.7µF to 10µF output capacitor with ESR 0.2Ω to 10Ω as close as possible to OUT and GND pins for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS76925DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps76925dbvr-etched.step / tps76925dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps76925dbvr.step / tps76925dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 ff01fa906899703c, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF