component

TPS76915DBVR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps76915dbvrfactory-2.0.0extractor-text
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TPS76915DBVR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS76915DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input pin; place the input capacitor as close as possible to the IN and GND pins, using the capacitance in Recommended Operating Conditions, with input voltage of 2.5 V to 16 V for the new chip (absolute maximum 18 V).
2 GND power_in Ground reference for all voltages; absolute maximum voltage ratings are referenced to GND.
3 EN input Enable pin, active low: driving it low enables the device and driving it high disables it, with low and high thresholds given in the Electrical Characteristics table and an absolute maximum of 18 V for the new chip.
4 FB/NC unconnected For the fixed-voltage version (as used by TPS76915) this pin is no-connect and must not be connected on the new chip, while the adjustable version uses it as the feedback pin and it must not be left floating.
5 OUT power_out Output pin; place the output capacitor as close as possible to the OUT and GND pins, using the capacitance and ESR range in Recommended Operating Conditions (2.2 µF minimum for the new chip), with output current up to 100 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS76915DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps76915dbvr-etched.step / tps76915dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps76915dbvr.step / tps76915dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 ff01fa906899703c, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF