component
TPS76912DBVR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| README.md | 23h ago |
| tps76912dbvr-etched.glb | 23h ago |
| tps76912dbvr-etched.step | 23h ago |
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TPS76912DBVR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPS76912DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input pin for the regulator; the datasheet recommends the input capacitor values in the Recommended Operating Conditions (CIN min 1 µF), placed as close as possible to the IN and GND pins, and the new-chip input range is 2.5 V to 16 V (absolute maximum 18 V). |
| 2 | GND | power_in | Ground reference pin; all voltages in the datasheet are referenced to GND. |
| 3 | EN | input | Active-low enable pin: driving it low enables the device and driving it high disables it, with new-chip EN voltage limits of 0 V to 16 V, a high-level threshold of 1.6 V minimum and a low-level threshold of 0.415 V maximum; EN has an internal pull-up, so leaving it floating disables the LDO. |
| 4 | FB/NC | unconnected | On the fixed-voltage version this pin is not connected (new chip: do not connect); it is the feedback input only on the adjustable TPS76901-Q1 version, where it must not be left floating. |
| 5 | OUT | power_out | Regulated output pin; the datasheet recommends the output capacitor values in the Recommended Operating Conditions (COUT min 2.2 µF for the new chip, ESR range 0 to 3 Ω), placed as close as possible to the OUT and GND pins, and the output voltage is limited to 1.2 V to 5 V for fixed versions (new chip). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TPS76912DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps76912dbvr-etched.step/tps76912dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76912dbvr.step/tps76912dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
ff01fa906899703c, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).