# TPS76850QDR

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TPS76850QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Regulator ground pin; on the SOIC-8 package it is the only ground pin, with no separate heatsink pin. |
| 2 | EN | input | Enable input: a high level (1.7 V minimum) shuts the regulator down and a low level (0.9 V maximum) enables it, and EN should be tied to ground if the shutdown feature is not used. |
| 3 | IN | power_in | Input voltage; the recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. |
| 4 | IN | power_in | Input voltage (second input pin, internally connected to pin 3); the recommended input range is 2.7 V to 10 V. |
| 5 | OUT | power_out | Regulated output voltage; 1.0 A maximum output current, and an output capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND. |
| 6 | OUT | power_out | Regulated output voltage (second output pin, internally connected to pin 5); 1.0 A maximum output current. |
| 7 | FB/NC | unconnected | Feedback input for the adjustable version only; for the fixed-output TPS76850 this pin is no connect and should be left unconnected. |
| 8 | PG | output | Open-drain power-good output that goes low when VO falls to between 92% and 98% of nominal and requires an external pullup resistor; maximum PG voltage is 16.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `TPS76850QDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tps76850qdr-etched.step` / `tps76850qdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76850qdr.step` / `tps76850qdr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps768) (31 pp, sha256 `742896d0a1cf7766`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps76850qdr-datasheet.pdf)