component
TPS76801QDR
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
TPS76801QDR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS76801QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Regulator ground pin for the SOIC-8 (D) package. |
| 2 | EN | input | Enable input: applying a TTL high signal shuts the regulator down, with the datasheet specifying a high-level enable input voltage of 1.7 V and a low-level enable input voltage of 0.9 V. |
| 3 | IN | power_in | Input voltage pin; the recommended input voltage range is 2.7 V to 10 V. |
| 4 | IN | power_in | Input voltage pin (second input pin, bonded in parallel with pin 3); the recommended input voltage range is 2.7 V to 10 V. |
| 5 | OUT | power_out | Regulated output voltage pin; the output current is specified from 0 to 1.0 A. |
| 6 | OUT | power_out | Regulated output voltage pin (second output pin, bonded in parallel with pin 5); the output current is specified from 0 to 1.0 A. |
| 7 | FB/NC | input | Feedback input voltage for the adjustable TPS76801 (set output 1.2 V to 5.5 V via external divider); no connect for fixed-output options. |
| 8 | PG | output | Open-drain power-good output that goes low when the output falls to between 92% and 98% of nominal; it requires an external pullup resistor and has an absolute maximum voltage of 16.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS76801QDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps76801qdr-etched.step/tps76801qdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76801qdr.step/tps76801qdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
742896d0a1cf7766, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS76801QDR
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS76801QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Regulator ground pin for the SOIC-8 (D) package. |
| 2 | EN | input | Enable input: applying a TTL high signal shuts the regulator down, with the datasheet specifying a high-level enable input voltage of 1.7 V and a low-level enable input voltage of 0.9 V. |
| 3 | IN | power_in | Input voltage pin; the recommended input voltage range is 2.7 V to 10 V. |
| 4 | IN | power_in | Input voltage pin (second input pin, bonded in parallel with pin 3); the recommended input voltage range is 2.7 V to 10 V. |
| 5 | OUT | power_out | Regulated output voltage pin; the output current is specified from 0 to 1.0 A. |
| 6 | OUT | power_out | Regulated output voltage pin (second output pin, bonded in parallel with pin 5); the output current is specified from 0 to 1.0 A. |
| 7 | FB/NC | input | Feedback input voltage for the adjustable TPS76801 (set output 1.2 V to 5.5 V via external divider); no connect for fixed-output options. |
| 8 | PG | output | Open-drain power-good output that goes low when the output falls to between 92% and 98% of nominal; it requires an external pullup resistor and has an absolute maximum voltage of 16.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPS76801QDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tps76801qdr-etched.step` / `tps76801qdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76801qdr.step` / `tps76801qdr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps768) (31 pp, sha256 `742896d0a1cf7766`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps76801qdr-datasheet.pdf)