# TPS76733QPWP

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20

TPS76733QPWP from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 2 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 3 | GND | power_in | Regulator ground pin. |
| 4 | NC | unconnected | No connect; no internal connection to the device. |
| 5 | EN | input | Enable input; a TTL high signal shuts down the regulator and reduces quiescent current to 1 µA at TJ = 25°C, and if the shutdown feature is not used EN should be tied to ground. Voltage at EN is limited to −0.3 V to VI + 0.3 V. |
| 6 | IN | power_in | Regulator input voltage; recommended input range is 2.7 V to 10 V, with an absolute maximum of 13.5 V. |
| 7 | IN | power_in | Regulator input voltage; recommended input range is 2.7 V to 10 V, with an absolute maximum of 13.5 V. |
| 8 | NC | unconnected | No connect; no internal connection to the device. |
| 9 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 10 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 11 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 12 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 13 | OUT | power_out | Regulated output voltage; output current is limited to 0 to 1.0 A and the output voltage absolute maximum is 7 V. |
| 14 | OUT | power_out | Regulated output voltage; output current is limited to 0 to 1.0 A and the output voltage absolute maximum is 7 V. |
| 15 | FB/NC | input | Feedback input for the adjustable version (1.5 V to 5.5 V); on fixed-output versions such as the TPS76733 this pin is no connect, and on the adjustable version routing should minimize noise pickup. |
| 16 | RESET | output | Open-drain RESET output that goes low when the output falls to between 92% and 98% of nominal and requires an external pullup; absolute maximum is 16.5 V. |
| 17 | NC | unconnected | No connect; no internal connection to the device. |
| 18 | NC | unconnected | No connect; no internal connection to the device. |
| 19 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 20 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and the PowerPAD heatsink; it should be connected to the board ground plane for heat removal. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 21 |

## CAD (KiCad official)

- Symbol: `TPS76733QPWP`
- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`
- 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps76733qpwp-etched.step` / `tps76733qpwp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76733qpwp.step` / `tps76733qpwp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps767) (37 pp, sha256 `8fecf68765895723`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps76733qpwp-datasheet.pdf)