component

TPS76733QDR

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps76733qdrfactory-2.0.0extractor-text

Verified TPS76733QDR

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS76733QDR · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 37-page datasheet
  • ✓distributor: lcsc C527568, digikey 296-46394-2-ND, mouser 595-TPS76733QDR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-otmrrjyg/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps76733qdr.kicad_sym✓ tps76733qdr.kicad_mod✓ tps76733qdr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17h ago
viewers tps76733qdr: viewers · Ray 17h ago
package.json Publish 0.1.0 · Ray 17h ago
page.json Set visibility: public · Ray 17h ago
README.md Publish 0.1.0 · Ray 17h ago
tps76733qdr-etched.glb Publish 0.1.0 · Ray 17h ago
tps76733qdr-etched.step tps76733qdr: factory component page (tier=mfr) · Ray 17h ago
tps76733qdr-hero.glb tps76733qdr: hero GLB from the etched model (keeps the MPN mark) · Ray 17h ago
tps76733qdr-hero.overlay.json Publish 0.1.0 · Ray 17h ago
tps76733qdr.glb Publish 0.1.0 · Ray 17h ago
tps76733qdr.kicad_mod Publish 0.1.0 · Ray 17h ago
tps76733qdr.kicad_sym Publish 0.1.0 · Ray 17h ago
tps76733qdr.lbr Publish 0.1.0 · Ray 17h ago
tps76733qdr.step Publish 0.1.0 · Ray 17h ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 17h ago

TPS76733QDR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TPS76733QDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Regulator ground; the datasheet gives no separate electrical limit for this pin.
2 EN input Enable input: a TTL high signal shuts the regulator down to about 1 µA quiescent current at TJ = 25°C, and EN should be tied to ground if shutdown is not used.
3 IN power_in Input voltage: recommended range 2.7 V to 10 V, with an absolute maximum of 13.5 V, and VIN must be at least VOUT + VDO or 2.7 V, whichever is greater.
4 IN power_in Input voltage: recommended range 2.7 V to 10 V, with an absolute maximum of 13.5 V, and VIN must be at least VOUT + VDO or 2.7 V, whichever is greater.
5 OUT power_out Regulated output voltage, rated 1 A continuous output current; the TPS76733 fixed version is 3.3 V and the output range is 1.2 V to 5.5 V.
6 OUT power_out Regulated output voltage, rated 1 A continuous output current; the TPS76733 fixed version is 3.3 V and the output range is 1.2 V to 5.5 V.
7 FB/NC input Feedback input for the adjustable version only; it is a no connect on fixed-output options such as the TPS76733 and should be routed away from noise pickup on adjustable parts.
8 RESET output Open-drain RESET output that goes low when the regulated output drops to between 92% and 98% of nominal and requires an external pullup resistor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage VO 3.2346 3.366 V TJ = −40°C to 125°C, 4.3 V < VIN < 10 V 6
Output voltage VO 3.3 V TJ = 25°C, 4.3 V < VIN < 10 V 6
Quiescent current (GND current) 125 µA EN = 0V, IO = 1 A, TJ = −40°C to 125°C 6
Quiescent current (GND current) 85 µA EN = 0V, 10 µA < IO < 1 A, TJ = 25°C 6
Dropout voltage 575 mV IO = 1 A, TJ = −40°C to 125°C 7
Dropout voltage 350 mV IO = 1 A, TJ = 25°C 7
Output current limit 1.2 1.7 2 A VO = 0 V 6
Standby current 10 µA TJ = −40°C to 125°C, EN = VI, 2.7 V < VI < 10 V 6
Standby current 1 µA EN = VI, TJ = 25°C, 2.7 V < VI < 10 V 6
High level enable input voltage 1.7 V 6
Low level enable input voltage 0.9 V 6
Input current (EN) -1 0 1 µA EN = 0 V 6
Input current (EN) -1 1 µA EN = VI 6
Minimum input voltage for valid RESET 1.1 V IO(RESET) = 300 µA 6
Trip threshold voltage 92 98 % VO decreasing 6
Output low voltage 0.15 0.4 V VI = 2.7 V, IO(RESET) = 1 mA 6
RESET time-out delay 200 ms 6
Output voltage line regulation ΔVO/VO 0.01 %/V VO + 1 V < VI ≤ 10 V, TJ = 25°C 6
Load regulation 3 mV 6
Power supply ripple rejection 60 dB f = 1 kHz, Co = 10 µF, TJ = 25°C 6
Thermal shutdown junction temperature 150 °C 6
Input voltage range VI -0.3 13.5 V 5
Maximum RESET voltage 16.5 V 5
Output voltage (OUT, FB) VO 7 V 5
Operating junction temperature range TJ -40 125 °C 5
Storage temperature range Tstg -65 150 °C 5
Input voltage VI 2.7 10 V 5
Output voltage range VO 1.2 5.5 V 5
Output current IO 0 1 A 5
Operating junction temperature TJ -40 125 °C 5
Junction-to-ambient thermal resistance RθJA 106.9 °C/W D (SOIC, 8 pins) 5
Junction-to-case (top) thermal resistance RθJC(top) 52.5 °C/W D (SOIC, 8 pins) 5
Junction-to-board thermal resistance RθJB 47.7 °C/W D (SOIC, 8 pins) 5
Junction-to-top characterization parameter ψJT 9 °C/W D (SOIC, 8 pins) 5
Junction-to-board characterization parameter ψJB 47.1 °C/W D (SOIC, 8 pins) 5

CAD (KiCad official)

  • Symbol: TPS76733QDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps76733qdr-etched.step / tps76733qdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps76733qdr.step / tps76733qdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 8fecf68765895723, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF