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TPS76725QPWPR

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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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package.json tps76725qpwpr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
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README.md Initial commit: component/tps76725qpwpr · Ray 25d ago
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tps76725qpwpr-etched.step tps76725qpwpr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tps76725qpwpr-hero.glb tps76725qpwpr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tps76725qpwpr-hero.overlay.json tps76725qpwpr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
tps76725qpwpr.glb plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago
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tps76725qpwpr.kicad_sym Publish 0.1.0 · Ray 25d ago
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tps76725qpwpr.step plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago

TPS76725QPWPR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20

TPS76725QPWPR from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
2 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
3 GND power_in Regulator ground reference pin.
4 NC unconnected No internal connection.
5 EN input Enable input where a TTL high signal shuts the regulator down into sleep mode, EN should be tied to ground if shutdown is not used, and the absolute maximum range at EN is -0.3 V to VI + 0.3 V.
6 IN power_in Input voltage pin with a recommended range of 2.7 V to 10 V and an absolute maximum input of 13.5 V.
7 IN power_in Input voltage pin with a recommended range of 2.7 V to 10 V and an absolute maximum input of 13.5 V.
8 NC unconnected No internal connection.
9 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
10 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
11 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
12 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
13 OUT power_out Regulated output that supplies 0 to 1.0 A with a 2% output voltage tolerance over line, load and temperature for fixed versions.
14 OUT power_out Regulated output that supplies 0 to 1.0 A with a 2% output voltage tolerance over line, load and temperature for fixed versions.
15 FB/NC input Feedback input used only for the adjustable version, and a no-connect on fixed-output versions such as the TPS76725.
16 RESET output Open-drain reset output that pulls low when the output falls to between 92% and 98% of nominal, requires an external pullup, and has a maximum RESET voltage of 16.5 V.
17 NC unconnected No internal connection.
18 NC unconnected No internal connection.
19 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
20 GND/HSINK power_in Ground and heatsink pin connected to the PowerPAD thermal pad, providing the ground return and heat path for the package.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS76725QPWPR
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps76725qpwpr-etched.step / tps76725qpwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps76725qpwpr.step / tps76725qpwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 8fecf68765895723, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF