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TPS76718QPWPR
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS76718QPWPR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-20
TPS76718QPWPR from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 2 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 3 | GND | power_in | Regulator ground pin. |
| 4 | NC | unconnected | No internal connection. |
| 5 | EN | input | Enable input; applying a TTL high signal shuts the regulator down into sleep mode, and EN should be tied to ground if the shutdown feature is not used. |
| 6 | IN | power_in | Input voltage pin; recommended input range is 2.7 V to 10 V, with VIN = VOUT + VDO or 2.7 V, whichever is greater. |
| 7 | IN | power_in | Input voltage pin; recommended input range is 2.7 V to 10 V, with VIN = VOUT + VDO or 2.7 V, whichever is greater. |
| 8 | NC | unconnected | No internal connection. |
| 9 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 10 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 11 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 12 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 13 | OUT | power_out | Regulated output voltage; output current is specified from 0 to 1.0 A. |
| 14 | OUT | power_out | Regulated output voltage; output current is specified from 0 to 1.0 A. |
| 15 | FB/NC | input | Feedback input voltage for the adjustable device; no connect for fixed-output options such as the TPS76718. |
| 16 | RESET | output | Open-drain RESET output that pulls low when the output falls to between 92% and 98% of nominal and requires an external pullup resistor. |
| 17 | NC | unconnected | No internal connection. |
| 18 | NC | unconnected | No internal connection. |
| 19 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 20 | GND/HSINK | power_in | Ground/heatsink pin that is tied to the regulator ground and should be used to remove heat from the package. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (10 µA to 1 A load), TJ = −40°C to 125°C | VO | 1.7646 | 1.836 | V | 10 µA to 1 A load; TJ = −40°C to 125°C; 2.8 V < VIN < 10 V | 6 | |
| Quiescent current (GND current), IO = 1 A, TJ = −40°C to 125°C | 125 | µA | EN = 0 V; IO = 1 A; TJ = −40°C to 125°C | 6 | |||
| Output current limit | 1.2 | 1.7 | 2 | A | VO = 0 V | 6 | |
| Standby current, TJ = −40°C to 125°C | 10 | µA | EN = VI; 2.7 V < VI < 10 V | 6 | |||
| Standby current, TJ = 25°C | 1 | µA | EN = VI; TJ = 25°C; 2.7 V < VI < 10 V | 6 | |||
| High level enable input voltage | 1.7 | V | 6 | ||||
| Low level enable input voltage | 0.9 | V | 6 | ||||
| Minimum input voltage for valid RESET | 1.1 | V | IO(RESET) = 300 µA | 6 | |||
| RESET trip threshold voltage, VO decreasing | 92 | 98 | % | VO decreasing | 6 | ||
| Output low voltage (RESET) | 0.15 | 0.4 | V | VI = 2.7 V; IO(RESET) = 1 mA | 6 | ||
| RESET leakage current | 1 | µA | V(RESET) = 5 V | 6 | |||
| Input current (EN) | -1 | 0 | 1 | µA | EN = 0 V | 6 | |
| Input current (EN) | -1 | 1 | µA | EN = VI | 6 | ||
| Absolute maximum input voltage range | VI | -0.3 | 13.5 | V | With respect to network terminal ground | 5 | |
| Maximum RESET voltage | 16.5 | V | 5 | ||||
| Output voltage range (OUT, FB), absolute maximum | VO | 7 | V | 5 | |||
| Operating junction temperature range (absolute maximum) | TJ | -40 | 125 | °C | 5 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| Input voltage | VI | 2.7 | 10 | V | Maximum VIN = VOUT + VDO or 2.7 V, whichever is greater | 5 | |
| Output voltage range | VO | 1.2 | 5.5 | V | 5 | ||
| Output current | IO | 0 | 1 | A | 5 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 5 | ||
| Junction-to-ambient thermal resistance (PWP, HTSSOP-20) | RθJA | 35.8 | °C/W | PWP (20-pin HTSSOP) | 5 | ||
| Junction-to-case (top) thermal resistance (PWP) | RθJC(top) | 26.1 | °C/W | PWP (20-pin HTSSOP) | 5 | ||
| Junction-to-board thermal resistance (PWP) | RθJB | 8.7 | °C/W | PWP (20-pin HTSSOP) | 5 | ||
| Junction-to-top characterization parameter (PWP) | ψJT | 0.4 | °C/W | PWP (20-pin HTSSOP) | 5 | ||
| Junction-to-board characterization parameter (PWP) | ψJB | 8.6 | °C/W | PWP (20-pin HTSSOP) | 5 | ||
| Junction-to-case (bottom) thermal resistance (PWP) | RθJC(bot) | 2.6 | °C/W | PWP (20-pin HTSSOP) | 5 | ||
| Output voltage (TJ = 25°C) | VO | 1.8 | V | TJ = 25°C; 2.8 V < VIN < 10 V; 10 µA to 1 A load | 6 | ||
| Output voltage line regulation | ΔVO/VO | 0.01 | %/V | VO + 1 V < VI ≤ 10 V; TJ = 25°C | 6 | ||
| Load regulation | 3 | mV | 6 | ||||
| Output noise voltage (TPS76718) | 55 | µVrms | BW = 200 Hz to 100 kHz; IO = 1 A; CO = 10 µF; TJ = 25°C | 6 | |||
| Power supply ripple rejection | PSRR | 60 | dB | f = 1 kHz; CO = 10 µF; TJ = 25°C | 6 | ||
| Reset hysteresis voltage | 0.5 | % | Measured at VO | 6 | |||
| RESET time-out delay | 200 | ms | 6 | ||||
| Thermal shutdown junction temperature | 150 | °C | 6 |
CAD (KiCad official)
- Symbol:
TPS76718QPWPR - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps76718qpwpr-etched.step/tps76718qpwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76718qpwpr.step/tps76718qpwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
8fecf68765895723, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).