component

TPS76550DR

Public Made by Adom

by adom

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps76550drfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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README.md Initial commit: component/tps76550dr · Ray 1mo ago
tps76550dr-etched.glb tps76550dr: factory component page (tier=lcsc) · Ray 1mo ago
tps76550dr-etched.step tps76550dr: factory component page (tier=lcsc) · Ray 1mo ago
tps76550dr-hero.glb tps76550dr: hero GLB from the etched model (keeps the MPN mark) · Ray 1mo ago
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TPS76550DR

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TPS76550DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB/NC input Feedback input for the adjustable version; this is a no-connect on fixed-output versions such as the TPS76550 (5.0 V).
2 PG output Open-drain power-good output that goes low when VO falls to 92% to 98% of nominal, and needs an external pullup; maximum PG voltage is 16.5 V.
3 GND power_in Regulator ground.
4 EN input Enable input: a high level of 2.0 V or more shuts the regulator down, a low level of 0.8 V or less enables it, and it should be tied to ground if the shutdown feature is unused.
5 IN power_in Input voltage; recommended range is 2.7 V to 10 V, with an absolute maximum of 13.5 V.
6 IN power_in Input voltage; recommended range is 2.7 V to 10 V, with an absolute maximum of 13.5 V (second IN pin, same net as pin 5).
7 OUT power_out Regulated 5.0 V output for the TPS76550, rated 0 to 150 mA and requiring at least 4.7 µF of output capacitance with ESR between 300 mΩ and 20 Ω.
8 OUT power_out Regulated 5.0 V output for the TPS76550, rated 0 to 150 mA and requiring at least 4.7 µF of output capacitance with ESR between 300 mΩ and 20 Ω (second OUT pin, same net as pin 7).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS76550DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps76550dr-etched.step / tps76550dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps76550dr.step / tps76550dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 91449654849d7c31, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF