# TPS76301DBVT

**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

TPS76301DBVT from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input supply pin; use a capacitor of 1µF or larger from this pin to ground. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | EN | input | Enable pin for the LDO; driving it high enables the device, driving it low disables the device, and it should be tied to VIN if unused (for new chip). |
| 4 | FB | input | Feedback pin that sets the output voltage with the help of the feedback divider (for TPS763 adjustable only). |
| 5 | OUT | output | Output of the regulator; use a capacitor of 2.2µF or larger from this pin to ground. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 2.7 |  | 10 | V |  | 4 |
| Enable voltage (new chip) | EN | 0 |  | 10 | V |  | 4 |
| Output voltage (new chip) | VOUT | 1.2 |  | 6.5 | V |  | 4 |
| Output current | IOUT | 0 |  | 150 | mA |  | 4 |
| Output capacitance (new chip) | COUT | 1 | 2.2 | 220 | µF |  | 4 |
| Output capacitor ESR (new chip) | COUT ESR | 0 |  | 1 | Ω |  | 4 |
| Input capacitance (new chip) | CIN | 0.47 |  |  | µF |  | 4 |
| Junction temperature (new chip) | TJ | -40 |  | 150 | °C |  | 4 |
| Voltage VIN (new chip) | VIN | -0.3 |  | 18 | V | All voltages with respect to GND | 4 |
| Voltage VOUT | VOUT | -0.3 |  | 7 | V | All voltages with respect to GND | 4 |
| Voltage VFB (new chip) | VFB | -0.3 |  | 3 | V | All voltages with respect to GND | 4 |
| Voltage range at EN (new chip) | EN | -0.3 |  | 18 | V | All voltages with respect to GND | 4 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature | TSTG | -65 |  | 150 | °C |  | 4 |
| Junction-to-ambient thermal resistance (new chip) | RθJA |  | 178.6 |  | °C/W | SOT-23 (DBV) 5 pins, new chip | 5 |
| Output voltage TPS76301 (new chip) | VOUT | 0.99 |  | 1.01 | x VOUT | 3.25V > VIN ≥ 2.7V, 2.5V ≥ VOUT ≥ 1.5V, IOUT = 1mA to 75mA, TJ = 25°C | 5 |
| Output voltage TPS76301 (new chip) | VOUT | 0.985 |  | 1.015 | x VOUT | 3.25V > VIN ≥ 2.7V, 2.5V ≥ VOUT ≥ 1.5V, IOUT = 1mA to 75mA | 5 |
| Quiescent current (new chip) | IQ |  | 65 | 125 | µA | IOUT = 0mA | 7 |
| Quiescent current (new chip) | IQ |  | 765 | 890 | µA | IOUT = 1mA to 150mA, TJ = 25°C | 7 |
| Quiescent current (new chip) | IQ |  |  | 1060 | µA | IOUT = 1mA to 150mA | 7 |
| Output voltage line regulation (new chip) | ΔVOUT/VOUT |  |  | 0.01 | %/V | VOUT(NOM) +1.0V ≤ VIN ≤ 10V, VIN ≥ 3.5V, TJ = 25°C | 7 |
| Output current limit (new chip) | ICL | 0.8 |  | 1.05 | A | VOUT = 0V | 7 |
| Standby current (new chip) | ISTANDBY |  |  | 1.25 | µA | EN < 0.15V, TJ = 25°C | 8 |
| Standby current (new chip) | ISTANDBY |  | 1.12 | 2.75 | µA | EN < 0.15V | 8 |
| High level enable input voltage (new chip) | EN | 0.85 |  | 1.6 | V |  | 8 |
| Low level enable input voltage (new chip) | EN | 0.15 |  | 0.72 | V |  | 8 |
| Power-supply ripple rejection (new chip) | PSRR |  | 58 |  | dB | COUT = 4.7µF, f = 1kHz, TJ = 25 ℃ | 8 |
| Input current EN (new chip) | IEN | -0.7 |  | -0.35 | µA | EN = 0V | 8 |
| Input current EN (new chip) | IEN | 0.008 |  | 0.8 | µA | EN = VIN | 8 |
| Dropout voltage TPS763xx (new chip) | VDO |  | 1 | 2.75 | mV | IOUT = 0mA, TJ = 25℃ | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  | 11.5 | 14 | mV | IOUT = 1mA, TJ = 25℃ | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  | 120 | 145 | mV | IOUT = 50mA, TJ = 25℃ | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  |  | 184 | mV | IOUT = 50mA | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  | 135 | 155 | mV | IOUT = 75mA, TJ = 25℃ | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  |  | 195 | mV | IOUT = 75mA | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  | 145 | 165 | mV | IOUT = 100mA, TJ = 25℃ | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  |  | 215 | mV | IOUT = 100mA | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  | 180 | 198 | mV | IOUT = 150mA, TJ = 25℃ | 9 |
| Dropout voltage TPS763xx (new chip) | VDO |  |  | 254 | mV | IOUT = 150mA | 9 |

## CAD (KiCad official)

- Symbol: `TPS76301DBVT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps76301dbvt-etched.step` / `tps76301dbvt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76301dbvt.step` / `tps76301dbvt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps763.pdf) (43 pp, sha256 `127f071e72d70ec4`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps76301dbvt-datasheet.pdf)